[Mesa-dev] [PATCH] virgl: add ARB_tessellation_shader support.
Dave Airlie
airlied at gmail.com
Fri Jun 8 05:15:36 UTC 2018
From: Dave Airlie <airlied at redhat.com>
This should add all the pieces to enable tess shaders on virgl.
This + fp64 enabled should give GL4.1
---
docs/features.txt | 2 +-
src/gallium/drivers/virgl/virgl_context.c | 82 ++++++++++++++++++++++++++++--
src/gallium/drivers/virgl/virgl_encode.c | 21 +++++++-
src/gallium/drivers/virgl/virgl_encode.h | 4 ++
src/gallium/drivers/virgl/virgl_protocol.h | 5 ++
src/gallium/drivers/virgl/virgl_screen.c | 10 +++-
6 files changed, 116 insertions(+), 8 deletions(-)
diff --git a/docs/features.txt b/docs/features.txt
index 6e5cbc8b11e..bc3fdbc8890 100644
--- a/docs/features.txt
+++ b/docs/features.txt
@@ -130,7 +130,7 @@ GL 4.0, GLSL 4.00 --- all DONE: i965/gen7+, nvc0, r600, radeonsi
GL_ARB_gpu_shader_fp64 DONE (i965/gen7+, llvmpipe, softpipe)
GL_ARB_sample_shading DONE (i965/gen6+, nv50, virgl)
GL_ARB_shader_subroutine DONE (freedreno, i965/gen6+, nv50, llvmpipe, softpipe, swr, virgl)
- GL_ARB_tessellation_shader DONE (i965/gen7+)
+ GL_ARB_tessellation_shader DONE (i965/gen7+, virgl)
GL_ARB_texture_buffer_object_rgb32 DONE (freedreno, i965/gen6+, llvmpipe, softpipe, swr, virgl)
GL_ARB_texture_cube_map_array DONE (i965/gen6+, nv50, llvmpipe, softpipe, virgl)
GL_ARB_texture_gather DONE (freedreno, i965/gen6+, nv50, llvmpipe, softpipe, swr, virgl)
diff --git a/src/gallium/drivers/virgl/virgl_context.c b/src/gallium/drivers/virgl/virgl_context.c
index 8d701bb8f40..cee58faa12e 100644
--- a/src/gallium/drivers/virgl/virgl_context.c
+++ b/src/gallium/drivers/virgl/virgl_context.c
@@ -469,9 +469,13 @@ static void *virgl_shader_encoder(struct pipe_context *ctx,
struct tgsi_token *new_tokens;
int ret;
- new_tokens = virgl_tgsi_transform(vctx, shader->tokens);
- if (!new_tokens)
- return NULL;
+ if (type != PIPE_SHADER_TESS_CTRL &&
+ type != PIPE_SHADER_TESS_EVAL) {
+ new_tokens = virgl_tgsi_transform(vctx, shader->tokens);
+ if (!new_tokens)
+ return NULL;
+ } else
+ new_tokens = shader->tokens;
handle = virgl_object_assign_handle();
/* encode VS state */
@@ -482,7 +486,8 @@ static void *virgl_shader_encoder(struct pipe_context *ctx,
return NULL;
}
- FREE(new_tokens);
+ if (new_tokens != shader->tokens)
+ FREE(new_tokens);
return (void *)(unsigned long)handle;
}
@@ -492,6 +497,18 @@ static void *virgl_create_vs_state(struct pipe_context *ctx,
return virgl_shader_encoder(ctx, shader, PIPE_SHADER_VERTEX);
}
+static void *virgl_create_tcs_state(struct pipe_context *ctx,
+ const struct pipe_shader_state *shader)
+{
+ return virgl_shader_encoder(ctx, shader, PIPE_SHADER_TESS_CTRL);
+}
+
+static void *virgl_create_tes_state(struct pipe_context *ctx,
+ const struct pipe_shader_state *shader)
+{
+ return virgl_shader_encoder(ctx, shader, PIPE_SHADER_TESS_EVAL);
+}
+
static void *virgl_create_gs_state(struct pipe_context *ctx,
const struct pipe_shader_state *shader)
{
@@ -534,6 +551,26 @@ virgl_delete_vs_state(struct pipe_context *ctx,
virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_SHADER);
}
+static void
+virgl_delete_tcs_state(struct pipe_context *ctx,
+ void *tcs)
+{
+ uint32_t handle = (unsigned long)tcs;
+ struct virgl_context *vctx = virgl_context(ctx);
+
+ virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_SHADER);
+}
+
+static void
+virgl_delete_tes_state(struct pipe_context *ctx,
+ void *tes)
+{
+ uint32_t handle = (unsigned long)tes;
+ struct virgl_context *vctx = virgl_context(ctx);
+
+ virgl_encode_delete_object(vctx, handle, VIRGL_OBJECT_SHADER);
+}
+
static void virgl_bind_vs_state(struct pipe_context *ctx,
void *vss)
{
@@ -543,6 +580,24 @@ static void virgl_bind_vs_state(struct pipe_context *ctx,
virgl_encode_bind_shader(vctx, handle, PIPE_SHADER_VERTEX);
}
+static void virgl_bind_tcs_state(struct pipe_context *ctx,
+ void *vss)
+{
+ uint32_t handle = (unsigned long)vss;
+ struct virgl_context *vctx = virgl_context(ctx);
+
+ virgl_encode_bind_shader(vctx, handle, PIPE_SHADER_TESS_CTRL);
+}
+
+static void virgl_bind_tes_state(struct pipe_context *ctx,
+ void *vss)
+{
+ uint32_t handle = (unsigned long)vss;
+ struct virgl_context *vctx = virgl_context(ctx);
+
+ virgl_encode_bind_shader(vctx, handle, PIPE_SHADER_TESS_EVAL);
+}
+
static void virgl_bind_gs_state(struct pipe_context *ctx,
void *vss)
{
@@ -801,6 +856,18 @@ static void virgl_set_clip_state(struct pipe_context *ctx,
virgl_encoder_set_clip_state(vctx, clip);
}
+static void virgl_set_tess_state(struct pipe_context *ctx,
+ const float default_outer_level[4],
+ const float default_inner_level[2])
+{
+ struct virgl_context *vctx = virgl_context(ctx);
+ struct virgl_screen *rs = virgl_screen(ctx->screen);
+
+ if (!rs->caps.caps.v1.bset.has_tessellation_shaders)
+ return;
+ virgl_encode_set_tess_state(vctx, default_outer_level, default_inner_level);
+}
+
static void virgl_resource_copy_region(struct pipe_context *ctx,
struct pipe_resource *dst,
unsigned dst_level,
@@ -893,15 +960,22 @@ struct pipe_context *virgl_context_create(struct pipe_screen *pscreen,
vctx->base.set_vertex_buffers = virgl_set_vertex_buffers;
vctx->base.set_constant_buffer = virgl_set_constant_buffer;
+ vctx->base.set_tess_state = virgl_set_tess_state;
vctx->base.create_vs_state = virgl_create_vs_state;
+ vctx->base.create_tcs_state = virgl_create_tcs_state;
+ vctx->base.create_tes_state = virgl_create_tes_state;
vctx->base.create_gs_state = virgl_create_gs_state;
vctx->base.create_fs_state = virgl_create_fs_state;
vctx->base.bind_vs_state = virgl_bind_vs_state;
+ vctx->base.bind_tcs_state = virgl_bind_tcs_state;
+ vctx->base.bind_tes_state = virgl_bind_tes_state;
vctx->base.bind_gs_state = virgl_bind_gs_state;
vctx->base.bind_fs_state = virgl_bind_fs_state;
vctx->base.delete_vs_state = virgl_delete_vs_state;
+ vctx->base.delete_tcs_state = virgl_delete_tcs_state;
+ vctx->base.delete_tes_state = virgl_delete_tes_state;
vctx->base.delete_gs_state = virgl_delete_gs_state;
vctx->base.delete_fs_state = virgl_delete_fs_state;
diff --git a/src/gallium/drivers/virgl/virgl_encode.c b/src/gallium/drivers/virgl/virgl_encode.c
index f3cbd1ca4b0..ad018bd1964 100644
--- a/src/gallium/drivers/virgl/virgl_encode.c
+++ b/src/gallium/drivers/virgl/virgl_encode.c
@@ -419,6 +419,8 @@ int virgl_encoder_draw_vbo(struct virgl_context *ctx,
const struct pipe_draw_info *info)
{
uint32_t length = VIRGL_DRAW_VBO_SIZE;
+ if (info->mode == PIPE_PRIM_PATCHES)
+ length = VIRGL_DRAW_VBO_SIZE_TESS;
if (info->indirect)
length = VIRGL_DRAW_VBO_SIZE_INDIRECT;
virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_DRAW_VBO, 0, length));
@@ -437,9 +439,11 @@ int virgl_encoder_draw_vbo(struct virgl_context *ctx,
virgl_encoder_write_dword(ctx->cbuf, info->count_from_stream_output->buffer_size);
else
virgl_encoder_write_dword(ctx->cbuf, 0);
+ if (length >= VIRGL_DRAW_VBO_SIZE_TESS) {
+ virgl_encoder_write_dword(ctx->cbuf, info->vertices_per_patch); /* vertices per patch */
+ virgl_encoder_write_dword(ctx->cbuf, info->drawid); /* drawid */
+ }
if (length == VIRGL_DRAW_VBO_SIZE_INDIRECT) {
- virgl_encoder_write_dword(ctx->cbuf, 0); /* vertices per patch */
- virgl_encoder_write_dword(ctx->cbuf, 0); /* drawid */
virgl_encoder_write_res(ctx, virgl_resource(info->indirect->buffer));
virgl_encoder_write_dword(ctx->cbuf, info->indirect->offset);
virgl_encoder_write_dword(ctx->cbuf, 0); /* indirect stride */
@@ -891,3 +895,16 @@ int virgl_encode_bind_shader(struct virgl_context *ctx,
virgl_encoder_write_dword(ctx->cbuf, type);
return 0;
}
+
+int virgl_encode_set_tess_state(struct virgl_context *ctx,
+ const float outer[4],
+ const float inner[2])
+{
+ int i;
+ virgl_encoder_write_cmd_dword(ctx, VIRGL_CMD0(VIRGL_CCMD_SET_TESS_STATE, 0, 6));
+ for (i = 0; i < 4; i++)
+ virgl_encoder_write_dword(ctx->cbuf, fui(outer[i]));
+ for (i = 0; i < 2; i++)
+ virgl_encoder_write_dword(ctx->cbuf, fui(inner[i]));
+ return 0;
+}
diff --git a/src/gallium/drivers/virgl/virgl_encode.h b/src/gallium/drivers/virgl/virgl_encode.h
index 02c032d673e..837075ea483 100644
--- a/src/gallium/drivers/virgl/virgl_encode.h
+++ b/src/gallium/drivers/virgl/virgl_encode.h
@@ -251,4 +251,8 @@ int virgl_encoder_destroy_sub_ctx(struct virgl_context *ctx, uint32_t sub_ctx_id
int virgl_encode_bind_shader(struct virgl_context *ctx,
uint32_t handle, uint32_t type);
+
+int virgl_encode_set_tess_state(struct virgl_context *ctx,
+ const float outer[4],
+ const float inner[2]);
#endif
diff --git a/src/gallium/drivers/virgl/virgl_protocol.h b/src/gallium/drivers/virgl/virgl_protocol.h
index 5dc2874d1dd..bd5a8b40434 100644
--- a/src/gallium/drivers/virgl/virgl_protocol.h
+++ b/src/gallium/drivers/virgl/virgl_protocol.h
@@ -83,6 +83,8 @@ enum virgl_context_cmd {
VIRGL_CCMD_CREATE_SUB_CTX,
VIRGL_CCMD_DESTROY_SUB_CTX,
VIRGL_CCMD_BIND_SHADER,
+
+ VIRGL_CCMD_SET_TESS_STATE,
};
/*
@@ -481,4 +483,7 @@ enum virgl_context_cmd {
#define VIRGL_BIND_SHADER_HANDLE 1
#define VIRGL_BIND_SHADER_TYPE 2
+/* tess state */
+#define VIRGL_TESS_STATE_SIZE 6
+
#endif
diff --git a/src/gallium/drivers/virgl/virgl_screen.c b/src/gallium/drivers/virgl/virgl_screen.c
index e8d1c751779..4e617e265ea 100644
--- a/src/gallium/drivers/virgl/virgl_screen.c
+++ b/src/gallium/drivers/virgl/virgl_screen.c
@@ -213,6 +213,8 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
return vscreen->caps.caps.v1.bset.transform_feedback_overflow_query;
case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
return vscreen->caps.caps.v2.shader_buffer_offset_alignment;
+ case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
+ return vscreen->caps.caps.v2.max_shader_patch_varyings;
case PIPE_CAP_TEXTURE_GATHER_SM5:
case PIPE_CAP_BUFFER_MAP_PERSISTENT_COHERENT:
case PIPE_CAP_FAKE_SW_MSAA:
@@ -227,7 +229,6 @@ virgl_get_param(struct pipe_screen *screen, enum pipe_cap param)
case PIPE_CAP_MULTISAMPLE_Z_RESOLVE:
case PIPE_CAP_RESOURCE_FROM_USER_MEMORY:
case PIPE_CAP_DEVICE_RESET_STATUS_QUERY:
- case PIPE_CAP_MAX_SHADER_PATCH_VARYINGS:
case PIPE_CAP_TEXTURE_FLOAT_LINEAR:
case PIPE_CAP_TEXTURE_HALF_FLOAT_LINEAR:
case PIPE_CAP_DEPTH_BOUNDS_TEST:
@@ -315,11 +316,18 @@ virgl_get_shader_param(struct pipe_screen *screen,
enum pipe_shader_cap param)
{
struct virgl_screen *vscreen = virgl_screen(screen);
+
+ if ((shader == PIPE_SHADER_TESS_CTRL || shader == PIPE_SHADER_TESS_EVAL) &&
+ !vscreen->caps.caps.v1.bset.has_tessellation_shaders)
+ return 0;
+
switch(shader)
{
case PIPE_SHADER_FRAGMENT:
case PIPE_SHADER_VERTEX:
case PIPE_SHADER_GEOMETRY:
+ case PIPE_SHADER_TESS_CTRL:
+ case PIPE_SHADER_TESS_EVAL:
switch (param) {
case PIPE_SHADER_CAP_MAX_INSTRUCTIONS:
case PIPE_SHADER_CAP_MAX_ALU_INSTRUCTIONS:
--
2.14.3
More information about the mesa-dev
mailing list