[Mesa-dev] [PATCH v3 33/53] intel/fs: Emit LINE+MAC for LINTERP with unaligned coordinates

[Matt Turner]

On Wed, May 30, 2018 at 4:25 PM Jason Ekstrand <jason at jlekstrand.net> wrote:
>
> On g4x through Sandy Bridge, src1 (the coordinates) of the PLN
> instruction is required to be an even register number.  When it's odd
> (which can happen with SIMD32), we have to emit a LINE+MAC combination
> instead.  Unfortunately, we can't just fall through to the gen4 case
> because the input registers are still set up for PLN which lays out the
> four src1 registers differently in SIMD16 than LINE.
>
> v2 (Jason Ekstrand):
>  - Take advantage of both accumulators and emit LINE LINE MAC MAC
>    (Based on a patch from Francisco Jerez)
>  - Unify the gen4 and gen4x-6 cases using a loop
>
> v3 (Jason Ekstrand):
>  - Don't unify gen4 with gen4x-6 as this turns out to be more fragile
>    than first thought without reworking the gen4 barycentric coordinate
>    layout.
> ---
>  src/intel/compiler/brw_fs_generator.cpp | 63 ++++++++++++++++++++++++++++-----
>  src/intel/compiler/brw_shader.cpp       |  3 +-
>  2 files changed, 56 insertions(+), 10 deletions(-)
>
> diff --git a/src/intel/compiler/brw_fs_generator.cpp b/src/intel/compiler/brw_fs_generator.cpp
> index 548a208..906c9c4 100644
> --- a/src/intel/compiler/brw_fs_generator.cpp
> +++ b/src/intel/compiler/brw_fs_generator.cpp
> @@ -761,16 +761,61 @@ fs_generator::generate_linterp(fs_inst *inst,
>
>        return true;
>     } else if (devinfo->has_pln) {
> -      /* From the Sandy Bridge PRM Vol. 4, Pt. 2, Section 8.3.53, "Plane":
> -       *
> -       *    "[DevSNB]:<src1> must be even register aligned.
> -       *
> -       * This restriction is lifted on Ivy Bridge.
> -       */
> -      assert(devinfo->gen >= 7 || (delta_x.nr & 1) == 0);
> -      brw_PLN(p, dst, interp, delta_x);
> +      if (devinfo->gen <= 6 && (delta_x.nr & 1) != 0) {
> +         /* From the Sandy Bridge PRM Vol. 4, Pt. 2, Section 8.3.53, "Plane":
> +          *
> +          *    "[DevSNB]:<src1> must be even register aligned.
> +          *
> +          * This restriction is lifted on Ivy Bridge.
> +          *
> +          * This means that we need to split PLN into LINE+MAC on-the-fly.
> +          * Unfortunately, the inputs are laid out for PLN and not LIN+MAC so

s/LIN/LINE/

Reviewed-by: Matt Turner <mattst88 at gmail.com>