[Mesa-dev] [PATCH 3/4] radeonsi: don't use the SPI barrier management bug workaround
Marek Olšák
maraeo at gmail.com
Tue Mar 27 15:13:10 UTC 2018
On Tue, Mar 27, 2018 at 4:11 AM, Samuel Pitoiset <samuel.pitoiset at gmail.com>
wrote:
>
>
> On 03/27/2018 02:39 AM, Marek Olšák wrote:
>
>> From: Marek Olšák <marek.olsak at amd.com>
>>
>> ---
>> src/gallium/drivers/radeonsi/si_shader.c | 5 +++++
>> 1 file changed, 5 insertions(+)
>>
>> diff --git a/src/gallium/drivers/radeonsi/si_shader.c
>> b/src/gallium/drivers/radeonsi/si_shader.c
>> index 8ae742c93f6..00ebbb9b0f2 100644
>> --- a/src/gallium/drivers/radeonsi/si_shader.c
>> +++ b/src/gallium/drivers/radeonsi/si_shader.c
>> @@ -7964,20 +7964,25 @@ static bool si_shader_select_ps_parts(struct
>> si_screen *sscreen,
>> if (!shader->key.part.ps.epilog.poly_line_smoothing &&
>> !shader->selector->info.reads_samplemask)
>> shader->config.spi_ps_input_ena &=
>> C_0286CC_SAMPLE_COVERAGE_ENA;
>> return true;
>> }
>> void si_multiwave_lds_size_workaround(struct si_screen *sscreen,
>> unsigned *lds_size)
>> {
>> + /* If tessellation is all offchip and on-chip GS isn't used, this
>> + * workaround is not needed.
>> + */
>> + return;
>>
>
> Is this expected to always return here? Why you don't remove the entire
> workaround then?
It documents why the workaround isn't needed.
Marek
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