[Mesa-dev] [PATCH 14/14] i965/blorp: Delete redundant code

[Nanley Chery]

---
 src/mesa/drivers/dri/i965/brw_blorp.c | 53 +++++++----------------------------
 1 file changed, 10 insertions(+), 43 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index 244067bfac6..2ec6f841502 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -1187,65 +1187,33 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
    if (x0 == x1 || y0 == y1)
       return;
 
-   bool can_fast_clear = !partial_clear;
+   bool can_fast_clear = true;
 
    bool color_write_disable[4] = { false, false, false, false };
    if (set_write_disables(irb, GET_COLORMASK(ctx->Color.ColorMask, buf),
                           color_write_disable))
       can_fast_clear = false;
 
-   /* We store clear colors as floats or uints as needed.  If there are
-    * texture views in play, the formats will not properly be respected
-    * during resolves because the resolve operations only know about the
-    * miptree and not the renderbuffer.
-    */
-   if (irb->Base.Base.Format != irb->mt->format)
-      can_fast_clear = false;
-
-   if (!irb->mt->supports_fast_clear ||
-       !brw_is_color_fast_clear_compatible(brw, irb->mt, &ctx->Color.ClearColor))
-      can_fast_clear = false;
-
-   /* Surface state can only record one fast clear color value. Therefore
-    * unless different levels/layers agree on the color it can be used to
-    * represent only single level/layer. Here it will be reserved for the
-    * first slice (level 0, layer 0).
-    */
-   if (irb->layer_count > 1 || irb->mt_level || irb->mt_layer)
-      can_fast_clear = false;
-
    unsigned level = irb->mt_level;
    const unsigned num_layers = fb->MaxNumLayers ? irb->layer_count : 1;
 
-   /* If the MCS buffer hasn't been allocated yet, we need to allocate it now.
-    */
-   if (can_fast_clear && !irb->mt->mcs_buf) {
-      assert(irb->mt->aux_usage == ISL_AUX_USAGE_CCS_D);
-      if (!intel_miptree_alloc_ccs(brw, irb->mt)) {
-         /* There are a few reasons in addition to out-of-memory, that can
-          * cause intel_miptree_alloc_non_msrt_mcs to fail.  Try to recover by
-          * falling back to non-fast clear.
-          */
-         can_fast_clear = false;
-      }
-   }
-
    /* FINISHME: Debug and enable fast clears */
    const struct gen_device_info *devinfo = &brw->screen->devinfo;
    if (devinfo->gen >= 11)
       can_fast_clear = false;
 
-   if (can_fast_clear) {
+   if (can_fast_clear &&
+       intel_miptree_set_clear_color(brw, irb->mt, irb->mt_level,
+                                     irb->mt_layer, num_layers, partial_clear,
+                                     irb->Base.Base.Format,
+                                     &ctx->Color.ClearColor)) {
+
+      /* We don't yet handle multiple slices. */
+      assert(num_layers == 1 && irb->mt_level == 0 && irb->mt_layer == 0 );
+
       const enum isl_aux_state aux_state =
          intel_miptree_get_aux_state(irb->mt, irb->mt_level, irb->mt_layer);
 
-      MAYBE_UNUSED const bool color_set =
-         intel_miptree_set_clear_color(brw, irb->mt, irb->mt_level,
-                                       irb->mt_layer, num_layers, partial_clear,
-                                       irb->Base.Base.Format,
-                                       &ctx->Color.ClearColor);
-      assert(color_set);
-
       /* If the buffer is already in ISL_AUX_STATE_CLEAR, the clear
        * is redundant and can be skipped.
        */
@@ -1255,7 +1223,6 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
       DBG("%s (fast) to mt %p level %d layers %d+%d\n", __FUNCTION__,
           irb->mt, irb->mt_level, irb->mt_layer, num_layers);
 
-      /* We can't setup the blorp_surf until we've allocated the MCS above */
       struct isl_surf isl_tmp[2];
       struct blorp_surf surf;
       blorp_surf_for_miptree(brw, &surf, irb->mt, irb->mt->aux_usage, true,
-- 
2.16.2