[Mesa-dev] [PATCH 13/14] i965/miptree: Allow failure when setting the clear color

[Nanley Chery]

To balance of the miptree clear color API, make this function behave
like the depth clear value setter.
---
 src/mesa/drivers/dri/i965/brw_blorp.c         |  7 +++-
 src/mesa/drivers/dri/i965/intel_mipmap_tree.c | 54 +++++++++++++++++++++++++--
 src/mesa/drivers/dri/i965/intel_mipmap_tree.h |  6 ++-
 3 files changed, 62 insertions(+), 5 deletions(-)

diff --git a/src/mesa/drivers/dri/i965/brw_blorp.c b/src/mesa/drivers/dri/i965/brw_blorp.c
index bf7164688bb..244067bfac6 100644
--- a/src/mesa/drivers/dri/i965/brw_blorp.c
+++ b/src/mesa/drivers/dri/i965/brw_blorp.c
@@ -1239,7 +1239,12 @@ do_single_blorp_clear(struct brw_context *brw, struct gl_framebuffer *fb,
       const enum isl_aux_state aux_state =
          intel_miptree_get_aux_state(irb->mt, irb->mt_level, irb->mt_layer);
 
-      intel_miptree_set_clear_color(brw, irb->mt, &ctx->Color.ClearColor);
+      MAYBE_UNUSED const bool color_set =
+         intel_miptree_set_clear_color(brw, irb->mt, irb->mt_level,
+                                       irb->mt_layer, num_layers, partial_clear,
+                                       irb->Base.Base.Format,
+                                       &ctx->Color.ClearColor);
+      assert(color_set);
 
       /* If the buffer is already in ISL_AUX_STATE_CLEAR, the clear
        * is redundant and can be skipped.
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
index bbf09153be7..3a764ef64ab 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
@@ -3777,18 +3777,66 @@ intel_miptree_get_aux_isl_usage(const struct brw_context *brw,
 
 bool
 intel_miptree_set_clear_color(struct brw_context *brw,
-                              struct intel_mipmap_tree *mt,
+                              struct intel_mipmap_tree *mt, uint32_t level,
+                              uint32_t start_layer, uint32_t num_layers,
+                              bool partial_clear, mesa_format view_format,
                               const union gl_color_union *color)
 {
+   if (!mt->supports_fast_clear)
+      return false;
+
+   if (!brw_is_color_fast_clear_compatible(brw, mt, color))
+      return false;
+
+   /* From the Kaby Lake PRM, Vol. 7, Section
+    * "Color Clear of Non-MultiSampler Render Target Restrictions":
+    *
+    *     Clear is supported only on the full RT; i.e., no partial clear or
+    *     overlapping clears.
+    *
+    * This restriction exists all the way back to Ivy Bridge.
+    */
+   if (partial_clear)
+      return false;
+
+   /* Surface state can only record one fast clear color value. Therefore
+    * unless different levels/layers agree on the color it can be used to
+    * represent only single level/layer. Here it will be reserved for the
+    * first slice (level 0, layer 0).
+    */
+   if (num_layers > 1 || level || start_layer) {
+      perf_debug("Multi-slice fast-clear disabled on color miptree.\n");
+      return false;
+   }
+
+   /* We store clear colors as floats or uints as needed.  If there are
+    * texture views in play, the formats will not properly be respected
+    * during resolves because the resolve operations only know about the
+    * miptree and not the renderbuffer.
+    */
+   if (view_format != mt->format) {
+      perf_debug("Texture view fast-clear disabled.\n");
+      return false;
+   }
+
+   /* In order to mark the range as having the given clear color, we need to
+    * have an aux buffer. If one hasn't been allocated yet, do it now.
+    */
+   if (!mt->mcs_buf) {
+      assert(mt->aux_usage == ISL_AUX_USAGE_CCS_D);
+      if (!intel_miptree_alloc_ccs(brw, mt))
+         return false;
+   }
+
    const union isl_color_value clear_color =
       brw_meta_convert_fast_clear_color(brw, mt, color);
 
    if (memcmp(&mt->fast_clear_color, &clear_color, sizeof(clear_color)) != 0) {
       mt->fast_clear_color = clear_color;
       brw->ctx.NewDriverState |= BRW_NEW_AUX_STATE;
-      return true;
    }
-   return false;
+
+   return true;
 }
 
 bool
diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
index 4915198ce1c..14f57294c06 100644
--- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
+++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
@@ -715,9 +715,13 @@ bool
 intel_miptree_sample_with_hiz(struct brw_context *brw,
                               struct intel_mipmap_tree *mt);
 
+/* Do what intel_miptree_set_depth_clear_value() does, but for color buffers.
+ */
 bool
 intel_miptree_set_clear_color(struct brw_context *brw,
-                              struct intel_mipmap_tree *mt,
+                              struct intel_mipmap_tree *mt, uint32_t level,
+                              uint32_t start_layer, uint32_t num_layers,
+                              bool partial_clear, mesa_format view_format,
                               const union gl_color_union *color);
 
 /* Get a clear color suitable for filling out an ISL surface state. */
-- 
2.16.2