[Mesa-dev] [PATCH v2 7.5/18] intel/compiler: support negate and abs of half float immediates

Jason Ekstrand jason at jlekstrand.net
Thu May 3 00:57:23 UTC 2018


Reviewed-by: Jason Ekstrand <jason at jlekstrand.net>

Have I reviewed everything?  Can we land shaderInt16 now?

--Jason

On Wed, May 2, 2018 at 5:18 PM, Jose Maria Casanova Crespo <
jmcasanova at igalia.com> wrote:

> ---
>  src/intel/compiler/brw_shader.cpp | 6 ++++--
>  1 file changed, 4 insertions(+), 2 deletions(-)
>
> diff --git a/src/intel/compiler/brw_shader.cpp b/src/intel/compiler/brw_
> shader.cpp
> index 284c2e8233c..537defd05d9 100644
> --- a/src/intel/compiler/brw_shader.cpp
> +++ b/src/intel/compiler/brw_shader.cpp
> @@ -605,7 +605,8 @@ brw_negate_immediate(enum brw_reg_type type, struct
> brw_reg *reg)
>     case BRW_REGISTER_TYPE_V:
>        assert(!"unimplemented: negate UV/V immediate");
>     case BRW_REGISTER_TYPE_HF:
> -      assert(!"unimplemented: negate HF immediate");
> +      reg->ud ^= 0x80008000;
> +      return true;
>     case BRW_REGISTER_TYPE_NF:
>        unreachable("no NF immediates");
>     }
> @@ -651,7 +652,8 @@ brw_abs_immediate(enum brw_reg_type type, struct
> brw_reg *reg)
>     case BRW_REGISTER_TYPE_V:
>        assert(!"unimplemented: abs V immediate");
>     case BRW_REGISTER_TYPE_HF:
> -      assert(!"unimplemented: abs HF immediate");
> +      reg->ud &= ~0x80008000;
> +      return true;
>     case BRW_REGISTER_TYPE_NF:
>        unreachable("no NF immediates");
>     }
> --
> 2.14.3
>
>
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