[Mesa-dev] [PATCH v2 12/32] intel/isl: Disallow Yf and Ys for 1D depth surfaces

[Pohjolainen, Topi]

On Fri, Oct 12, 2018 at 01:46:42PM -0500, Jason Ekstrand wrote:
> ---
>  src/intel/isl/isl_gen7.c | 9 +++++++++
>  1 file changed, 9 insertions(+)
> 
> diff --git a/src/intel/isl/isl_gen7.c b/src/intel/isl/isl_gen7.c
> index f6f7e1ba7dc..fe420e4fbd8 100644
> --- a/src/intel/isl/isl_gen7.c
> +++ b/src/intel/isl/isl_gen7.c
> @@ -217,6 +217,15 @@ isl_gen6_filter_tiling(const struct isl_device *dev,
>     if (isl_surf_usage_is_depth(info->usage)) {
>        /* Depth requires Y. */
>        *flags &= ISL_TILING_ANY_Y_MASK;
> +
> +      /* The Yf and Ys tilings for 1D can't be easily faked as a 2D surface
> +       * because there's no calculable qpitch.

Why is this problem for depth only?

> +       *
> +       * TODO: In theory, on could fake it with surface offset tricks but
> +       * that's currently being left as an exercise to the reader.
> +       */
> +      if (info->dim == ISL_SURF_DIM_1D)
> +         *flags &= ~ISL_TILING_STD_Y_MASK;
>     }
>  
>     /* Separate stencil requires W tiling, and W tiling requires separate
> -- 
> 2.19.1
> 
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