[Mesa-dev] [PATCH 1/5] i965/icl: Fix L3 configurations

[Eero Tamminen]

Hi,

On 16.11.2018 10.33, Francisco Jerez wrote:
> Kenneth Graunke <kenneth at whitecape.org> writes:
[...]
>> Perhaps we'll get both configs working, and then will want to be able
>> to select between them.  I question whether the additional URB is truly
>> that valuable - how large are the actual gains? - considering that we
>> have to stall in order to reconfigure everything anyway...

It's more about value of additional space for caching textures.

One can calculate required max URB space when GS/TS isn't used, whereas 
textures can fill all available cache.  For example, if draw does just a 
single quad, L3 is better utilized with minimal URB space and leaving 
rest for texture caching.


> That just means that the update frequency needs to be low enough for the
> stall overhead to be negligible -- E.g. at batch buffer boundaries or
> wherever we're getting stalled anyway.


	- Eero