[Mesa-dev] [PATCH] radeonsi: fix a radeon kernel clear state error

Marek Olšák maraeo at gmail.com
Thu Oct 18 19:53:42 UTC 2018


Hi Sonny,

Can you send a version that only does >= CIK && drm_major == 3? It's
equivalent to your version but simpler.

Marek

On Thu, Oct 18, 2018 at 12:40 PM Jiang, Sonny <Sonny.Jiang at amd.com> wrote:

> Signed-off-by: Sonny Jiang <sonny.jiang at amd.com>
> ---
>  src/gallium/drivers/radeonsi/si_pipe.c  | 7 +++++--
>  src/gallium/drivers/radeonsi/si_state.c | 5 +++--
>  2 files changed, 8 insertions(+), 4 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_pipe.c
> b/src/gallium/drivers/radeonsi/si_pipe.c
> index 9d25748df4..3da44483d6 100644
> --- a/src/gallium/drivers/radeonsi/si_pipe.c
> +++ b/src/gallium/drivers/radeonsi/si_pipe.c
> @@ -991,8 +991,11 @@ struct pipe_screen *radeonsi_screen_create(struct
> radeon_winsys *ws,
>         }
>
>         /* The mere presense of CLEAR_STATE in the IB causes random GPU
> hangs
> -        * on SI. */
> -       sscreen->has_clear_state = sscreen->info.chip_class >= CIK;
> +        * on SI. Some CLEAR_STATE cause asic hang on radeon kernel, etc.
> +        * SPI_VS_OUT_CONFIG. So only enable CI CLEAR_STATE on amdgpu
> kernel.*/
> +       sscreen->has_clear_state = sscreen->info.chip_class > CIK ||
> +                                  (sscreen->info.chip_class == CIK &&
> +                                  sscreen->info.drm_major == 3);
>
>         sscreen->has_distributed_tess =
>                 sscreen->info.chip_class >= VI &&
> diff --git a/src/gallium/drivers/radeonsi/si_state.c
> b/src/gallium/drivers/radeonsi/si_state.c
> index 8b2e6e57f4..ba84a5a42a 100644
> --- a/src/gallium/drivers/radeonsi/si_state.c
> +++ b/src/gallium/drivers/radeonsi/si_state.c
> @@ -4899,8 +4899,9 @@ static void si_init_config(struct si_context *sctx)
>         bool has_clear_state = sscreen->has_clear_state;
>         struct si_pm4_state *pm4 = CALLOC_STRUCT(si_pm4_state);
>
> -       /* Only SI can disable CLEAR_STATE for now. */
> -       assert(has_clear_state || sscreen->info.chip_class == SI);
> +       /* SI, radeon kernel CIK disabled CLEAR_STATE. */
> +       assert(has_clear_state || sscreen->info.chip_class == SI ||
> +               (sscreen->info.chip_class == CIK &&
> sscreen->info.drm_major != 3));
>
>         if (!pm4)
>                 return;
> --
> 2.17.1
>
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