[Mesa-dev] [PATCH v3 11/44] nir: add new floating point conversion opcodes taking into account rounding mode

[Samuel Iglesias Gonsálvez]

It adds round-towards-zero and round-to-nearest-even opcodes for
floating point conversions.

According to Vulkan spec, the new execution modes affect only
correctly rounded SPIR-V instructions, which includes these conversions.

v2:
- Move code to nir_opcodes.py (Connor)

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
---
 src/compiler/nir/nir_opcodes.py   | 20 ++++++++++++++++++--
 src/compiler/nir/nir_opcodes_c.py |  4 ++--
 2 files changed, 20 insertions(+), 4 deletions(-)

diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py
index 21f6ee6f742..f8997444c28 100644
--- a/src/compiler/nir/nir_opcodes.py
+++ b/src/compiler/nir/nir_opcodes.py
@@ -221,12 +221,28 @@ for src_t in [tint, tuint, tfloat, tbool]:
 
    for dst_t in dst_types:
       for bit_size in type_sizes(dst_t):
-          if bit_size == 16 and dst_t == tfloat and src_t == tfloat:
+          if src_t == tfloat and dst_t == tfloat:
               rnd_modes = ['_rtne', '_rtz', '']
               for rnd_mode in rnd_modes:
+                  if rnd_mode == '_rtne':
+                     src = "bit_size == 64 ? _mesa_double_to_float_rtne(src0) : src0"
+                  if rnd_mode == '_rtz':
+                     src = "bit_size == 64 ? _mesa_double_to_float_rtz(src0) : src0"
+                  else:
+                     src = "src0"
                   unop_numeric_convert("{0}2{1}{2}{3}".format(src_t[0], dst_t[0],
                                                               bit_size, rnd_mode),
-                                       dst_t + str(bit_size), src_t, "src0", rnd_mode)
+                                       dst_t + str(bit_size), src_t, src, rnd_mode)
+          elif src_t == tfloat and dst_t == tint:
+               rnd_modes = ['_rtne', '_rtz', '']
+               for rnd_mode in rnd_modes:
+                  if rnd_mode == '_rtne':
+                     src = "bit_size == 32 ? _mesa_roundevenf(src0) : _mesa_roundeven(src0)"
+                  else:
+                     src = "src0"
+                  unop_numeric_convert("{0}2{1}{2}{3}".format(src_t[0], dst_t[0],
+                                                              bit_size, rnd_mode),
+                                       dst_t + str(bit_size), src_t, src, rnd_mode)
           else:
               conv_expr = "src0 != 0" if dst_t == tbool else "src0"
               unop_numeric_convert("{0}2{1}{2}".format(src_t[0], dst_t[0], bit_size),
diff --git a/src/compiler/nir/nir_opcodes_c.py b/src/compiler/nir/nir_opcodes_c.py
index c6cab5a5e1a..46bbb400b84 100644
--- a/src/compiler/nir/nir_opcodes_c.py
+++ b/src/compiler/nir/nir_opcodes_c.py
@@ -76,7 +76,7 @@ nir_type_conversion_op(nir_alu_type src, nir_alu_type dst, nir_rounding_mode rnd
                switch (dst_bit_size) {
 %                 for dst_bits in type_sizes(dst_t):
                   case ${dst_bits}:
-%                    if src_t == 'float' and dst_t == 'float' and dst_bits == 16:
+%                    if src_t == 'float' and dst_t == 'float':
                      switch(rnd) {
 %                       for rnd_t in [('rtne', '_rtne'), ('rtz', '_rtz'), ('undef', '')]:
                         case nir_rounding_mode_${rnd_t[0]}:
@@ -84,7 +84,7 @@ nir_type_conversion_op(nir_alu_type src, nir_alu_type dst, nir_rounding_mode rnd
                                                                    dst_bits, rnd_t[1])};
 %                       endfor
                         default:
-                           unreachable("Invalid 16-bit nir rounding mode");
+                           unreachable("Invalid ${dst_bits}-bit nir rounding mode");
                      }
 %                    else:
                      assert(rnd == nir_rounding_mode_undef);
-- 
2.19.1