[Mesa-dev] [PATCH v3 12/44] nir: add new fadd, fsub, fmul opcodes taking into account rounding mode

Samuel Iglesias Gonsálvez siglesias at igalia.com
Wed Feb 6 10:44:41 UTC 2019


According to Vulkan spec, the new execution modes affect only
correctly rounded SPIR-V instructions, which includes fadd,
fsub and fmul.

Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
---
 src/compiler/nir/nir_opcodes.py | 17 +++++++++++++++++
 1 file changed, 17 insertions(+)

diff --git a/src/compiler/nir/nir_opcodes.py b/src/compiler/nir/nir_opcodes.py
index f8997444c28..7b45d38f460 100644
--- a/src/compiler/nir/nir_opcodes.py
+++ b/src/compiler/nir/nir_opcodes.py
@@ -453,9 +453,15 @@ def binop_convert(name, out_type, in_type, alg_props, const_expr):
    opcode(name, 0, out_type, [0, 0], [in_type, in_type],
           False, alg_props, const_expr, "")
 
+def binop_convert_rounding_mode(name, out_type, in_type, alg_props, const_expr, rounding_mode):
+   opcode(name, 0, out_type, [0, 0], [in_type, in_type], False, alg_props, const_expr, rounding_mode)
+
 def binop(name, ty, alg_props, const_expr):
    binop_convert(name, ty, ty, alg_props, const_expr)
 
+def binop_rounding_mode(name, ty, alg_props, const_expr, rounding_mode):
+   binop_convert_rounding_mode(name, ty, ty, alg_props, const_expr, rounding_mode)
+
 def binop_compare(name, ty, alg_props, const_expr):
    binop_convert(name, tbool1, ty, alg_props, const_expr)
 
@@ -490,13 +496,24 @@ def binop_reduce(name, output_size, output_type, src_type, prereduce_expr,
           final(reduce_(reduce_(src0, src1), reduce_(src2, src3))), "")
 
 binop("fadd", tfloat, commutative + associative, "src0 + src1")
+binop_rounding_mode("fadd_rtne", tfloat, commutative + associative,
+                    "_mesa_roundeven(src0 + src1)", "_rtne")
+binop_rounding_mode("fadd_rtz", tfloat, commutative + associative, "src0 + src1", "_rtz")
+
 binop("iadd", tint, commutative + associative, "src0 + src1")
 binop("uadd_sat", tuint, commutative,
       "(src0 + src1) < src0 ? UINT64_MAX : (src0 + src1)")
 binop("fsub", tfloat, "", "src0 - src1")
+binop_rounding_mode("fsub_rtne", tfloat, "",
+                    "_mesa_roundeven(src0 - src1)", "_rtne")
+binop_rounding_mode("fsub_rtz", tfloat, "", "src0 - src1", "_rtz")
 binop("isub", tint, "", "src0 - src1")
 
 binop("fmul", tfloat, commutative + associative, "src0 * src1")
+binop_rounding_mode("fmul_rtne", tfloat, commutative + associative,
+                    "_mesa_roundeven(src0 * src1)", "_rtne")
+binop_rounding_mode("fmul_rtz", tfloat, commutative + associative, "src0 * src1", "_rtz")
+
 # low 32-bits of signed/unsigned integer multiply
 binop("imul", tint, commutative + associative, "src0 * src1")
 
-- 
2.19.1



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