[Mesa-dev] [PATCH 1/2] isl: remove the cache line size alignment requirement
chris at chris-wilson.co.uk
Mon Feb 18 15:08:16 UTC 2019
Quoting Lionel Landwerlin (2019-02-18 15:06:15)
> On 15/02/2019 14:43, Samuel Iglesias Gonsálvez wrote:
> > There are formats which bpp are not aligned to a power-of-two and
> > that can cause problems in the checks we do.
> > The cacheline size was a requirement for using the BLT engine, which
> > we don't use anymore except for a few things on old HW, so we drop it.
> > Fixes CTS's CL#3500 test:
> > dEQP-VK.api.image_clearing.core.clear_color_image.2d.linear.single_layer.r8g8b8_unorm
> > Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
> That looks good to me :
> Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>
> I'm doing a CI run just to convince myself, so if you can wait for that.
Is scanout a concern? The display engine also requires 64B alignment for
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