[Mesa-dev] [PATCH v2 2/2] isl: the display engine requires 64B alignment for linear surfaces

[Lionel Landwerlin]

I did not find the PRM bit that says it must be 64b aligned, but I can 
see that's what i915 checks.

Chris: If you have a pointer to it, I could add the quote.

Thanks!

Reviewed-by: Lionel Landwerlin <lionel.g.landwerlin at intel.com>

On 19/02/2019 12:06, Samuel Iglesias Gonsálvez wrote:
> Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
> ---
>   src/intel/isl/isl.c | 3 +++
>   1 file changed, 3 insertions(+)
>
> diff --git a/src/intel/isl/isl.c b/src/intel/isl/isl.c
> index 5c34efb9a13..7fb469687fa 100644
> --- a/src/intel/isl/isl.c
> +++ b/src/intel/isl/isl.c
> @@ -1519,6 +1519,9 @@ isl_surf_init_s(const struct isl_device *dev,
>            }
>         }
>         base_alignment_B = isl_round_up_to_power_of_two(base_alignment_B);
> +      /* The display engine requires 64B alignment for linear surfaces.  */
> +      if (isl_surf_usage_is_display(info->usage))
> +         base_alignment_B = MAX(base_alignment_B, 64);
>      } else {
>         const uint32_t total_h_tl =
>            isl_align_div(phys_total_el.h, tile_info.logical_extent_el.height);