[Mesa-dev] [PATCH 1/2] i965/genX_state: Add register access functions

[Lionel Landwerlin]

Sorry, for replying so late, going through my unread emails :(

We already have functions for doing this :

brw_load_register_reg
brw_load_register_imm32/64
brw_load_register_mem

Why not use those?

-
Lionel

On 13/11/2018 00:05, Jordan Justen wrote:
> Signed-off-by: Jordan Justen <jordan.l.justen at intel.com>
> ---
>   src/mesa/drivers/dri/i965/genX_state_upload.c | 31 +++++++++++++++++++
>   1 file changed, 31 insertions(+)
>
> diff --git a/src/mesa/drivers/dri/i965/genX_state_upload.c b/src/mesa/drivers/dri/i965/genX_state_upload.c
> index 5acd0922922..6495862e700 100644
> --- a/src/mesa/drivers/dri/i965/genX_state_upload.c
> +++ b/src/mesa/drivers/dri/i965/genX_state_upload.c
> @@ -197,6 +197,37 @@ KSP(UNUSED struct brw_context *brw, uint32_t offset)
>           _brw_cmd_pack(cmd)(brw, (void *)_dst, &name),              \
>           _dst = NULL)
>   
> +#if GEN_GEN >= 7
> +static void
> +emit_lrm(struct brw_context *brw, uint32_t reg, struct brw_address addr)
> +{
> +   brw_batch_emit(brw, GENX(MI_LOAD_REGISTER_MEM), lrm) {
> +      lrm.RegisterAddress  = reg;
> +      lrm.MemoryAddress    = addr;
> +   }
> +}
> +#endif
> +
> +MAYBE_UNUSED static void
> +emit_lri(struct brw_context *brw, uint32_t reg, uint32_t imm)
> +{
> +   brw_batch_emit(brw, GENX(MI_LOAD_REGISTER_IMM), lri) {
> +      lri.RegisterOffset   = reg;
> +      lri.DataDWord        = imm;
> +   }
> +}
> +
> +#if GEN_IS_HASWELL || GEN_GEN >= 8
> +MAYBE_UNUSED static void
> +emit_lrr(struct brw_context *brw, uint32_t dst, uint32_t src)
> +{
> +   brw_batch_emit(brw, GENX(MI_LOAD_REGISTER_REG), lrr) {
> +      lrr.SourceRegisterAddress        = src;
> +      lrr.DestinationRegisterAddress   = dst;
> +   }
> +}
> +#endif
> +
>   /**
>    * Polygon stipple packet
>    */