[Mesa-dev] [PATCH 2/8] i965: r8stencil_mt/needs_update renamed to shadow_mt/needs_update

[Nanley Chery]

On Mon, Nov 19, 2018 at 10:54:06AM +0200, Eleni Maria Stea wrote:
> Renamed the r8stencil_mt and r8stencil_needs_update to shadow_mt and
> shadow_needs_update respectively to allow reusing the shadow_mt as a
> generic purpose secondary mipmap tree.

The series I pointed you to earlier has a patch like this, but it's more
complete. It also modifies the comment above the data structure being
modified. Do you want to review it?

https://patchwork.freedesktop.org/patch/253197/

I think what people usually do in this case is send out their series
with the other person's patch included (and their rb tacked onto it).

-Nanley

> ---
>  src/mesa/drivers/dri/i965/brw_wm_surface_state.c |  8 ++++----
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.c    | 16 ++++++++--------
>  src/mesa/drivers/dri/i965/intel_mipmap_tree.h    |  4 ++--
>  3 files changed, 14 insertions(+), 14 deletions(-)
> 
> diff --git a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> index 8d21cf5fa7..e214fae140 100644
> --- a/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> +++ b/src/mesa/drivers/dri/i965/brw_wm_surface_state.c
> @@ -563,15 +563,15 @@ static void brw_update_texture_surface(struct gl_context *ctx,
>  
>        if (obj->StencilSampling && firstImage->_BaseFormat == GL_DEPTH_STENCIL) {
>           if (devinfo->gen <= 7) {
> -            assert(mt->r8stencil_mt && !mt->stencil_mt->r8stencil_needs_update);
> -            mt = mt->r8stencil_mt;
> +            assert(mt->shadow_mt && !mt->stencil_mt->shadow_needs_update);
> +            mt = mt->shadow_mt;
>           } else {
>              mt = mt->stencil_mt;
>           }
>           format = ISL_FORMAT_R8_UINT;
>        } else if (devinfo->gen <= 7 && mt->format == MESA_FORMAT_S_UINT8) {
> -         assert(mt->r8stencil_mt && !mt->r8stencil_needs_update);
> -         mt = mt->r8stencil_mt;
> +         assert(mt->shadow_mt && !mt->shadow_needs_update);
> +         mt = mt->shadow_mt;
>           format = ISL_FORMAT_R8_UINT;
>        }
>  
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> index 5e11ec0c30..0e67e4d8f3 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.c
> @@ -1216,7 +1216,7 @@ intel_miptree_release(struct intel_mipmap_tree **mt)
>  
>        brw_bo_unreference((*mt)->bo);
>        intel_miptree_release(&(*mt)->stencil_mt);
> -      intel_miptree_release(&(*mt)->r8stencil_mt);
> +      intel_miptree_release(&(*mt)->shadow_mt);
>        intel_miptree_aux_buffer_free((*mt)->aux_buf);
>        free_aux_state_map((*mt)->aux_state);
>  
> @@ -2429,7 +2429,7 @@ intel_miptree_finish_write(struct brw_context *brw,
>     switch (mt->aux_usage) {
>     case ISL_AUX_USAGE_NONE:
>        if (mt->format == MESA_FORMAT_S_UINT8 && devinfo->gen <= 7)
> -         mt->r8stencil_needs_update = true;
> +         mt->shadow_needs_update = true;
>        break;
>  
>     case ISL_AUX_USAGE_MCS:
> @@ -2935,9 +2935,9 @@ intel_update_r8stencil(struct brw_context *brw,
>  
>     assert(src->surf.size_B > 0);
>  
> -   if (!mt->r8stencil_mt) {
> +   if (!mt->shadow_mt) {
>        assert(devinfo->gen > 6); /* Handle MIPTREE_LAYOUT_GEN6_HIZ_STENCIL */
> -      mt->r8stencil_mt = make_surface(
> +      mt->shadow_mt = make_surface(
>                              brw,
>                              src->target,
>                              MESA_FORMAT_R_UINT8,
> @@ -2951,13 +2951,13 @@ intel_update_r8stencil(struct brw_context *brw,
>                              ISL_TILING_Y0_BIT,
>                              ISL_SURF_USAGE_TEXTURE_BIT,
>                              BO_ALLOC_BUSY, 0, NULL);
> -      assert(mt->r8stencil_mt);
> +      assert(mt->shadow_mt);
>     }
>  
> -   if (src->r8stencil_needs_update == false)
> +   if (src->shadow_needs_update == false)
>        return;
>  
> -   struct intel_mipmap_tree *dst = mt->r8stencil_mt;
> +   struct intel_mipmap_tree *dst = mt->shadow_mt;
>  
>     for (int level = src->first_level; level <= src->last_level; level++) {
>        const unsigned depth = src->surf.dim == ISL_SURF_DIM_3D ?
> @@ -2977,7 +2977,7 @@ intel_update_r8stencil(struct brw_context *brw,
>     }
>  
>     brw_cache_flush_for_read(brw, dst->bo);
> -   src->r8stencil_needs_update = false;
> +   src->shadow_needs_update = false;
>  }
>  
>  static void *
> diff --git a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> index b0333655ad..b955a2bab1 100644
> --- a/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> +++ b/src/mesa/drivers/dri/i965/intel_mipmap_tree.h
> @@ -302,8 +302,8 @@ struct intel_mipmap_tree
>      *
>      * \see intel_update_r8stencil()
>      */
> -   struct intel_mipmap_tree *r8stencil_mt;
> -   bool r8stencil_needs_update;
> +   struct intel_mipmap_tree *shadow_mt;
> +   bool shadow_needs_update;
>  
>     /**
>      * \brief CCS, MCS, or HiZ auxiliary buffer.
> -- 
> 2.19.0
> 
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