[Mesa-dev] [PATCH 4/5] radeonsi: don't leak an index buffer if draw_vbo fails

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/drivers/radeonsi/si_state_draw.c | 8 +++++---
 1 file changed, 5 insertions(+), 3 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index c7c02d20d15..9c968e39c2c 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -1365,21 +1365,21 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
 			info->mode == PIPE_PRIM_TRIANGLE_STRIP_ADJACENCY &&
 			!info->primitive_restart;
 
 		if (gs_tri_strip_adj_fix != sctx->gs_tri_strip_adj_fix) {
 			sctx->gs_tri_strip_adj_fix = gs_tri_strip_adj_fix;
 			sctx->do_update_shaders = true;
 		}
 	}
 
 	if (sctx->do_update_shaders && !si_update_shaders(sctx))
-		return;
+		goto return_cleanup;
 
 	if (index_size) {
 		/* Translate or upload, if needed. */
 		/* 8-bit indices are supported on VI. */
 		if (sctx->chip_class <= CIK && index_size == 1) {
 			unsigned start, count, start_offset, size, offset;
 			void *ptr;
 
 			si_get_draw_start_count(sctx, info, &start, &count);
 			start_offset = start * 2;
@@ -1447,39 +1447,39 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
 		}
 	}
 
 	si_need_gfx_cs_space(sctx);
 
 	/* Since we've called si_context_add_resource_size for vertex buffers,
 	 * this must be called after si_need_cs_space, because we must let
 	 * need_cs_space flush before we add buffers to the buffer list.
 	 */
 	if (!si_upload_vertex_buffer_descriptors(sctx))
-		return;
+		goto return_cleanup;
 
 	/* Use optimal packet order based on whether we need to sync the pipeline. */
 	if (unlikely(sctx->flags & (SI_CONTEXT_FLUSH_AND_INV_CB |
 				      SI_CONTEXT_FLUSH_AND_INV_DB |
 				      SI_CONTEXT_PS_PARTIAL_FLUSH |
 				      SI_CONTEXT_CS_PARTIAL_FLUSH))) {
 		/* If we have to wait for idle, set all states first, so that all
 		 * SET packets are processed in parallel with previous draw calls.
 		 * Then draw and prefetch at the end. This ensures that the time
 		 * the CUs are idle is very short.
 		 */
 		unsigned masked_atoms = 0;
 
 		if (unlikely(sctx->flags & SI_CONTEXT_FLUSH_FOR_RENDER_COND))
 			masked_atoms |= si_get_atom_bit(sctx, &sctx->atoms.s.render_cond);
 
 		if (!si_upload_graphics_shader_descriptors(sctx))
-			return;
+			goto return_cleanup;
 
 		/* Emit all states except possibly render condition. */
 		si_emit_all_states(sctx, info, masked_atoms);
 		si_emit_cache_flush(sctx);
 		/* <-- CUs are idle here. */
 
 		if (si_is_atom_dirty(sctx, &sctx->atoms.s.render_cond))
 			sctx->atoms.s.render_cond.emit(sctx);
 		sctx->dirty_atoms = 0;
 
@@ -1532,20 +1532,22 @@ static void si_draw_vbo(struct pipe_context *ctx, const struct pipe_draw_info *i
 		sctx->num_decompress_calls++;
 	} else {
 		sctx->num_draw_calls++;
 		if (sctx->framebuffer.state.nr_cbufs > 1)
 			sctx->num_mrt_draw_calls++;
 		if (info->primitive_restart)
 			sctx->num_prim_restart_calls++;
 		if (G_0286E8_WAVESIZE(sctx->spi_tmpring_size))
 			sctx->num_spill_draw_calls++;
 	}
+
+return_cleanup:
 	if (index_size && indexbuf != info->index.resource)
 		pipe_resource_reference(&indexbuf, NULL);
 }
 
 static void
 si_draw_rectangle(struct blitter_context *blitter,
 		  void *vertex_elements_cso,
 		  blitter_get_vs_func get_vs,
 		  int x1, int y1, int x2, int y2,
 		  float depth, unsigned num_instances,
-- 
2.17.1