[Mesa-dev] [PATCH 2/4] radv: set max workgroup size to 128 for TES as NGG on GFX10
Samuel Pitoiset
samuel.pitoiset at gmail.com
Tue Jul 9 06:27:29 UTC 2019
Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---
src/amd/vulkan/radv_nir_to_llvm.c | 2 +-
1 file changed, 1 insertion(+), 1 deletion(-)
diff --git a/src/amd/vulkan/radv_nir_to_llvm.c b/src/amd/vulkan/radv_nir_to_llvm.c
index 9644185f870..67630c4ee92 100644
--- a/src/amd/vulkan/radv_nir_to_llvm.c
+++ b/src/amd/vulkan/radv_nir_to_llvm.c
@@ -3721,7 +3721,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(struct ac_llvm_compiler *ac_llvm,
}
if (ctx.ac.chip_class >= GFX10) {
- if (shaders[0]->info.stage == MESA_SHADER_VERTEX &&
+ if (is_pre_gs_stage(shaders[0]->info.stage) &&
options->key.vs.out.as_ngg) {
ctx.max_workgroup_size = 128;
}
--
2.22.0
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