[Mesa-dev] [PATCH 4/6] radv: emit VGT_GS_MAX_VERT_OUT for legacy and NGG paths for GS

[Samuel Pitoiset]

Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---
 src/amd/vulkan/radv_pipeline.c | 5 +++--
 1 file changed, 3 insertions(+), 2 deletions(-)

diff --git a/src/amd/vulkan/radv_pipeline.c b/src/amd/vulkan/radv_pipeline.c
index 703dbe54507..ce315da47c3 100644
--- a/src/amd/vulkan/radv_pipeline.c
+++ b/src/amd/vulkan/radv_pipeline.c
@@ -3563,8 +3563,6 @@ radv_pipeline_generate_hw_gs(struct radeon_cmdbuf *ctx_cs,
 		offset += num_components[3] * gs_max_out_vertices;
 	radeon_set_context_reg(ctx_cs, R_028AB0_VGT_GSVS_RING_ITEMSIZE, offset);
 
-	radeon_set_context_reg(ctx_cs, R_028B38_VGT_GS_MAX_VERT_OUT, gs->info.gs.vertices_out);
-
 	radeon_set_context_reg_seq(ctx_cs, R_028B5C_VGT_GS_VERT_ITEMSIZE, 4);
 	radeon_emit(ctx_cs, num_components[0]);
 	radeon_emit(ctx_cs, (max_stream >= 1) ? num_components[1] : 0);
@@ -3626,6 +3624,9 @@ radv_pipeline_generate_geometry_shader(struct radeon_cmdbuf *ctx_cs,
 		radv_pipeline_generate_hw_ngg(ctx_cs, cs, pipeline, gs, ngg_state);
 	else
 		radv_pipeline_generate_hw_gs(ctx_cs, cs, pipeline, gs, gs_state);
+
+	radeon_set_context_reg(ctx_cs, R_028B38_VGT_GS_MAX_VERT_OUT,
+			      gs->info.gs.vertices_out);
 }
 
 static uint32_t offset_to_ps_input(uint32_t offset, bool flat_shade, bool float16)
-- 
2.22.0