[Mesa-dev] [PATCH] radeonsi/nir: Fix type in bindless address computation

[Marek Olšák]

Reviewed-by: Marek Olšák <marek.olsak at amd.com>

Marek

On Fri, May 31, 2019 at 8:55 AM Connor Abbott <cwabbott0 at gmail.com> wrote:

> Bindless handles in GL are 64-bit. This fixes an assert failure in LLVM.
> ---
>
> With this patch, we now have Piglit parity in debug mode.
>
>  src/gallium/drivers/radeonsi/si_shader_nir.c | 4 ++--
>  1 file changed, 2 insertions(+), 2 deletions(-)
>
> diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c
> b/src/gallium/drivers/radeonsi/si_shader_nir.c
> index 19ed71ae05d..72e6ffbac8a 100644
> --- a/src/gallium/drivers/radeonsi/si_shader_nir.c
> +++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
> @@ -1020,7 +1020,7 @@ si_nir_load_sampler_desc(struct ac_shader_abi *abi,
>                          * 16-dword slots for now.
>                          */
>                         dynamic_index = LLVMBuildMul(ctx->ac.builder,
> dynamic_index,
> -                                            LLVMConstInt(ctx->i32, 2, 0),
> "");
> +                                            LLVMConstInt(ctx->i64, 2, 0),
> "");
>
>                         return si_load_image_desc(ctx, list,
> dynamic_index, desc_type,
>                                                   dcc_off, true);
> @@ -1032,7 +1032,7 @@ si_nir_load_sampler_desc(struct ac_shader_abi *abi,
>                  * to prevent incorrect code generation and hangs.
>                  */
>                 dynamic_index = LLVMBuildMul(ctx->ac.builder,
> dynamic_index,
> -                                            LLVMConstInt(ctx->i32, 2, 0),
> "");
> +                                            LLVMConstInt(ctx->i64, 2, 0),
> "");
>                 list = ac_build_pointer_add(&ctx->ac, list, dynamic_index);
>                 return si_load_sampler_desc(ctx, list, ctx->i32_0,
> desc_type);
>         }
> --
> 2.17.2
>
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