[Mesa-dev] freedreno: 'Unhandled NIR tex src type: 11' on A3XX

[Brian Masney]

On Sat, Jun 08, 2019 at 10:58:11PM -0400, Jonathan Marek wrote:
> Hi,
> 
> It's possible 19.1 has another issue, I only tested the master branch with
> my fix. I would suggest trying 19.0 or the master branch.

The mesa master branch and 19.0.6 both give the following error when
glxgears starts up:

../src/gallium/drivers/freedreno/freedreno_batch.c:424:fd_batch_add_dep: Assertion `!batch_depends_on(dep, batch)' failed.

> FYI, I haven't pushed it anywhere but I recently rebased my Nexus 5 patches
> from last year (and been looking at getting call audio working).

Fantastic!

Brian



> On 6/8/19 9:08 PM, Brian Masney wrote:
> > Hi,
> > 
> > I'm trying to get the GPU working using the Freedreno driver (A330) on
> > the Nexus 5 phone. I'm using kernel 5.2rc3 with some out of tree patches
> > related to the GPU [1] and mesa 19.1.0-rc5 on postmarketOS. When I run
> > glxgears, I see the gears show up for a fraction of a second and then
> > it terminates due to the following error:
> > 
> > -----
> > shader: MESA_SHADER_FRAGMENT
> > inputs: 1
> > outputs: 1
> > uniforms: 0
> > shared: 0
> > decl_var uniform INTERP_MODE_NONE sampler2D sampler (0, 0, 0)
> > decl_var shader_in INTERP_MODE_SMOOTH vec4 in_0 (VARYING_SLOT_VAR0, 0, 0)
> > decl_var shader_out INTERP_MODE_FLAT vec4 out_0 (FRAG_RESULT_DATA0, 0, 0)
> > decl_function main (0 params)
> > 
> > impl main {
> >          block block_0:
> >          /* preds: */
> >          vec1 32 ssa_0 = load_const (0x00000000 /* 0.000000 */)
> >          vec2 32 ssa_1 = intrinsic load_barycentric_pixel () (1) /* interp_mode=1 */
> >          vec4 32 ssa_2 = intrinsic load_interpolated_input (ssa_1, ssa_0) (0, 0) /* base=0 */ /* component=0 */  /* in_0 */
> >          vec1 32 ssa_3 = deref_var &sampler (uniform sampler2D)
> >          vec2 32 ssa_4 = vec2 ssa_2.x, ssa_2.y
> >          vec4 32 ssa_5 = tex ssa_3 (texture_deref), ssa_3 (sampler_deref), ssa_4 (coord)
> > Unhandled NIR tex src type: 11
> > 
> > 
> >          intrinsic store_output (ssa_5, ssa_0) (0, 15, 0) /* base=0 */ /* wrmask=xyzw */ /* component=0 */       /* out_0 */
> >          /* succs: block_1 */
> >          block block_1:
> > }
> > 
> > Assertion failed: !"" (../src/freedreno/ir3/ir3_context.c: ir3_context_error: 407)
> > -----
> > 
> > I verified that the mesa 19.1.0-rc5 release contains this recent a3xx
> > fix from Jonathan:
> > https://gitlab.freedesktop.org/mesa/mesa/commit/1db86d8b62860380c34af77ae62b019ed2376443
> > 
> > Any suggestions?
> > 
> > [1] https://github.com/masneyb/linux/commits/v5.2-rc3-nexus5-gpu-wip
> >      The GPU specific patches start at Rob's patch 'qcom-scm: add support
> >      to restore secure config' on that list. I submitted the patches
> >      below that a few weeks ago to the upstream kernel and I expect
> >      they'll be merged. Once I have a working GPU, I plan to start
> >      working on the interconnect support in the kernel for msm8974 so
> >      that the clock hacks can be dropped.
> > 
> > Brian
> >