[Mesa-dev] [PATCH 6/8] radv: set the DCC/FCE predicates from the base level

Samuel Pitoiset samuel.pitoiset at gmail.com
Mon Jun 17 10:44:18 UTC 2019


Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
---
 src/amd/vulkan/radv_meta_fast_clear.c | 2 ++
 1 file changed, 2 insertions(+)

diff --git a/src/amd/vulkan/radv_meta_fast_clear.c b/src/amd/vulkan/radv_meta_fast_clear.c
index 8fba2aa4b5c..eba0477c405 100644
--- a/src/amd/vulkan/radv_meta_fast_clear.c
+++ b/src/amd/vulkan/radv_meta_fast_clear.c
@@ -604,6 +604,7 @@ radv_emit_color_decompress(struct radv_cmd_buffer *cmd_buffer,
 	if (radv_image_has_dcc(image)) {
 		uint64_t pred_offset = decompress_dcc ? image->dcc_pred_offset :
 							image->fce_pred_offset;
+		pred_offset += 8 * subresourceRange->baseMipLevel;
 
 		old_predicating = cmd_buffer->state.predicating;
 
@@ -695,6 +696,7 @@ radv_emit_color_decompress(struct radv_cmd_buffer *cmd_buffer,
 	if (radv_image_has_dcc(image)) {
 		uint64_t pred_offset = decompress_dcc ? image->dcc_pred_offset :
 							image->fce_pred_offset;
+		pred_offset += 8 * subresourceRange->baseMipLevel;
 
 		cmd_buffer->state.predicating = old_predicating;
 
-- 
2.22.0



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