[Mesa-dev] [PATCH] radv: adjust the DCC base VA for mipmapped color attachments

[Bas Nieuwenhuizen]

Reviewed-by: Bas Nieuwenhuizen <bas at basnieuwenhuizen.nl>

On Tue, Jun 18, 2019 at 11:48 AM Samuel Pitoiset
<samuel.pitoiset at gmail.com> wrote:
>
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
>  src/amd/vulkan/radv_device.c | 5 +++++
>  1 file changed, 5 insertions(+)
>
> diff --git a/src/amd/vulkan/radv_device.c b/src/amd/vulkan/radv_device.c
> index 1424eaef21d..1d59aaa0b03 100644
> --- a/src/amd/vulkan/radv_device.c
> +++ b/src/amd/vulkan/radv_device.c
> @@ -4322,6 +4322,11 @@ radv_initialise_color_surface(struct radv_device *device,
>
>         va = radv_buffer_get_va(iview->bo) + iview->image->offset;
>         va += iview->image->dcc_offset;
> +
> +       if (radv_dcc_enabled(iview->image, iview->base_mip) &&
> +           device->physical_device->rad_info.chip_class <= GFX8)
> +               va += plane->surface.u.legacy.level[iview->base_mip].dcc_offset;
> +
>         cb->cb_dcc_base = va >> 8;
>         cb->cb_dcc_base |= surf->tile_swizzle;
>
> --
> 2.22.0
>
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