[Mesa-dev] [PATCH 2/3] radeonsi/nir: call nir_opt_combine_stores()
Timothy Arceri
tarceri at itsqueeze.com
Thu Mar 14 00:02:12 UTC 2019
shader-db results (VEGA64):
Totals from affected shaders:
SGPRS: 4992920 -> 4992920 (0.00 %)
VGPRS: 2787092 -> 2786916 (-0.01 %)
Spilled SGPRs: 35987 -> 35987 (0.00 %)
Spilled VGPRs: 29024 -> 29024 (0.00 %)
Private memory VGPRs: 0 -> 0 (0.00 %)
Scratch size: 1200 -> 1200 (0.00 %) dwords per thread
Code Size: 115681712 -> 115675472 (-0.01 %) bytes
LDS: 1522 -> 1522 (0.00 %) blocks
Max Waves: 866585 -> 866595 (0.00 %)
Wait states: 0 -> 0 (0.00 %)
---
src/gallium/drivers/radeonsi/si_shader_nir.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/src/gallium/drivers/radeonsi/si_shader_nir.c b/src/gallium/drivers/radeonsi/si_shader_nir.c
index 5ac18e2ebc8..bef2a0d0d66 100644
--- a/src/gallium/drivers/radeonsi/si_shader_nir.c
+++ b/src/gallium/drivers/radeonsi/si_shader_nir.c
@@ -867,6 +867,7 @@ si_lower_nir(struct si_shader_selector* sel)
NIR_PASS(progress, sel->nir, nir_opt_copy_prop_vars);
NIR_PASS(progress, sel->nir, nir_opt_dead_write_vars);
+ NIR_PASS(progress, sel->nir, nir_opt_combine_stores, nir_var_all);
NIR_PASS_V(sel->nir, nir_lower_alu_to_scalar);
NIR_PASS_V(sel->nir, nir_lower_phis_to_scalar);
--
2.20.1
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