[Mesa-dev] [PATCH 2/4] ac: add ac_build_frex_exp() helper ans 16-bit/32-bit support

[Timothy Arceri]

This change broke radeonsi for:

tests/spec/arb_gpu_shader_fp64/execution/built-in-functions/fs-frexp-dvec4.shader_test

LLVM ERROR: Cannot select: intrinsic %llvm.amdgcn.frexp.exp

On 23/3/19 12:52 am, Samuel Pitoiset wrote:
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
>   src/amd/common/ac_llvm_build.c  | 24 ++++++++++++++++++++++++
>   src/amd/common/ac_llvm_build.h  |  4 ++++
>   src/amd/common/ac_nir_to_llvm.c |  8 +++++---
>   3 files changed, 33 insertions(+), 3 deletions(-)
>
> diff --git a/src/amd/common/ac_llvm_build.c b/src/amd/common/ac_llvm_build.c
> index 4fd1d14b78f..5572b244720 100644
> --- a/src/amd/common/ac_llvm_build.c
> +++ b/src/amd/common/ac_llvm_build.c
> @@ -3927,6 +3927,30 @@ ac_build_shuffle(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef ind
>   		  AC_FUNC_ATTR_CONVERGENT);
>   }
>   
> +LLVMValueRef
> +ac_build_frexp_exp(struct ac_llvm_context *ctx, LLVMValueRef src0,
> +		   unsigned bitsize)
> +{
> +	LLVMTypeRef type;
> +	char *intr;
> +
> +	if (bitsize == 16) {
> +		intr = "llvm.amdgcn.frexp.exp.i16.f16";
> +		type = ctx->i16;
> +	} else if (bitsize == 32) {
> +		intr = "llvm.amdgcn.frexp.exp.i32.f32";
> +		type = ctx->i32;
> +	} else {
> +		intr = "llvm.amdgcn.frexp.exp.i32.f64";
> +		type = ctx->i64;
> +	}
> +
> +	LLVMValueRef params[] = {
> +		src0,
> +	};
> +	return ac_build_intrinsic(ctx, intr, type, params, 1,
> +				  AC_FUNC_ATTR_READNONE);
> +}
>   LLVMValueRef
>   ac_build_frexp_mant(struct ac_llvm_context *ctx, LLVMValueRef src0,
>   		    unsigned bitsize)
> diff --git a/src/amd/common/ac_llvm_build.h b/src/amd/common/ac_llvm_build.h
> index db20b39d443..c3277fd2d13 100644
> --- a/src/amd/common/ac_llvm_build.h
> +++ b/src/amd/common/ac_llvm_build.h
> @@ -677,6 +677,10 @@ ac_build_quad_swizzle(struct ac_llvm_context *ctx, LLVMValueRef src,
>   LLVMValueRef
>   ac_build_shuffle(struct ac_llvm_context *ctx, LLVMValueRef src, LLVMValueRef index);
>   
> +LLVMValueRef
> +ac_build_frexp_exp(struct ac_llvm_context *ctx, LLVMValueRef src0,
> +		   unsigned bitsize);
> +
>   LLVMValueRef
>   ac_build_frexp_mant(struct ac_llvm_context *ctx, LLVMValueRef src0,
>   		    unsigned bitsize);
> diff --git a/src/amd/common/ac_nir_to_llvm.c b/src/amd/common/ac_nir_to_llvm.c
> index 307a71c00ab..9331fd14b7d 100644
> --- a/src/amd/common/ac_nir_to_llvm.c
> +++ b/src/amd/common/ac_nir_to_llvm.c
> @@ -803,9 +803,11 @@ static void visit_alu(struct ac_nir_context *ctx, const nir_alu_instr *instr)
>   		break;
>   	case nir_op_frexp_exp:
>   		src[0] = ac_to_float(&ctx->ac, src[0]);
> -		result = ac_build_intrinsic(&ctx->ac, "llvm.amdgcn.frexp.exp.i32.f64",
> -					    ctx->ac.i32, src, 1, AC_FUNC_ATTR_READNONE);
> -
> +		result = ac_build_frexp_exp(&ctx->ac, src[0],
> +					    ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])));
> +		if (ac_get_elem_bits(&ctx->ac, LLVMTypeOf(src[0])) == 16)
> +			result = LLVMBuildSExt(ctx->ac.builder, result,
> +					       ctx->ac.i32, "");
>   		break;
>   	case nir_op_frexp_sig:
>   		src[0] = ac_to_float(&ctx->ac, src[0]);