[Mesa-dev] [PATCH] radv: do not need to force emit the TCS regs on Vega20

[Marek Olšák]

This bug is only on Vega10 and Raven1.

Marek

On Wed, May 1, 2019 at 10:10 AM Samuel Pitoiset <samuel.pitoiset at gmail.com>
wrote:

> This chip doesn't need the fixup. This fixes a bunch of
> dEQP-VK.tessellation tests and avoid random GPU hangs.
>
> Cc: "19.0" <mesa-stable at lists.freedesktop.org>
> Signed-off-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
> ---
>  src/amd/vulkan/radv_nir_to_llvm.c | 1 +
>  1 file changed, 1 insertion(+)
>
> diff --git a/src/amd/vulkan/radv_nir_to_llvm.c
> b/src/amd/vulkan/radv_nir_to_llvm.c
> index adf158e30e1..b4a19aa2e5d 100644
> --- a/src/amd/vulkan/radv_nir_to_llvm.c
> +++ b/src/amd/vulkan/radv_nir_to_llvm.c
> @@ -3691,6 +3691,7 @@ LLVMModuleRef ac_translate_nir_to_llvm(struct
> ac_llvm_compiler *ac_llvm,
>                 ac_init_exec_full_mask(&ctx.ac);
>
>         if (ctx.ac.chip_class == GFX9 &&
> +           ctx.ac.family != CHIP_VEGA20 &&
>             shaders[shader_count - 1]->info.stage == MESA_SHADER_TESS_CTRL)
>                 ac_nir_fixup_ls_hs_input_vgprs(&ctx);
>
> --
> 2.21.0
>
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> mesa-dev at lists.freedesktop.org
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