[Mesa-dev] [PATCH 5/6] radeonsi: use an explicit symbol for the LSHS LDS memory

[Nicolai Hähnle]

From: Nicolai Hähnle <nicolai.haehnle at amd.com>

---
 src/gallium/drivers/radeonsi/si_shader.c     | 17 +++++++++++++++--
 src/gallium/drivers/radeonsi/si_state_draw.c |  5 +++++
 2 files changed, 20 insertions(+), 2 deletions(-)

diff --git a/src/gallium/drivers/radeonsi/si_shader.c b/src/gallium/drivers/radeonsi/si_shader.c
index d127b525963..0cf4d01a36f 100644
--- a/src/gallium/drivers/radeonsi/si_shader.c
+++ b/src/gallium/drivers/radeonsi/si_shader.c
@@ -4842,22 +4842,35 @@ static void create_function(struct si_shader_context *ctx)
 
 	for (i = 0; i < fninfo.num_sgpr_params; ++i)
 		shader->info.num_input_sgprs += ac_get_type_size(fninfo.types[i]) / 4;
 
 	for (; i < fninfo.num_params; ++i)
 		shader->info.num_input_vgprs += ac_get_type_size(fninfo.types[i]) / 4;
 
 	assert(shader->info.num_input_vgprs >= num_prolog_vgprs);
 	shader->info.num_input_vgprs -= num_prolog_vgprs;
 
-	if (shader->key.as_ls || ctx->type == PIPE_SHADER_TESS_CTRL)
-		ac_declare_lds_as_pointer(&ctx->ac);
+	if (shader->key.as_ls || ctx->type == PIPE_SHADER_TESS_CTRL) {
+		if (USE_LDS_SYMBOLS && HAVE_LLVM >= 0x0900) {
+			/* The LSHS size is not known until draw time, so we append it
+			 * at the end of whatever LDS use there may be in the rest of
+			 * the shader (currently none, unless LLVM decides to do its
+			 * own LDS-based lowering).
+			 */
+			ctx->ac.lds = LLVMAddGlobalInAddressSpace(
+				ctx->ac.module, LLVMArrayType(ctx->i32, 0),
+				"__lds_end", AC_ADDR_SPACE_LDS);
+			LLVMSetAlignment(ctx->ac.lds, 256);
+		} else {
+			ac_declare_lds_as_pointer(&ctx->ac);
+		}
+	}
 }
 
 /**
  * Load ESGS and GSVS ring buffer resource descriptors and save the variables
  * for later use.
  */
 static void preload_ring_buffers(struct si_shader_context *ctx)
 {
 	LLVMBuilderRef builder = ctx->ac.builder;
 
diff --git a/src/gallium/drivers/radeonsi/si_state_draw.c b/src/gallium/drivers/radeonsi/si_state_draw.c
index 8e01e1b35e1..011aaf18ab1 100644
--- a/src/gallium/drivers/radeonsi/si_state_draw.c
+++ b/src/gallium/drivers/radeonsi/si_state_draw.c
@@ -244,20 +244,25 @@ static void si_emit_derived_tess_state(struct si_context *sctx,
 	} else {
 		assert(lds_size <= 32768);
 		lds_size = align(lds_size, 256) / 256;
 	}
 
 	/* Set SI_SGPR_VS_STATE_BITS. */
 	sctx->current_vs_state &= C_VS_STATE_LS_OUT_PATCH_SIZE &
 				  C_VS_STATE_LS_OUT_VERTEX_SIZE;
 	sctx->current_vs_state |= tcs_in_layout;
 
+	/* We should be able to support in-shader LDS use with LLVM >= 9
+	 * by just adding the lds_sizes together, but it has never
+	 * been tested. */
+	assert(ls_current->config.lds_size == 0);
+
 	if (sctx->chip_class >= GFX9) {
 		unsigned hs_rsrc2 = ls_current->config.rsrc2 |
 				    S_00B42C_LDS_SIZE(lds_size);
 
 		radeon_set_sh_reg(cs, R_00B42C_SPI_SHADER_PGM_RSRC2_HS, hs_rsrc2);
 
 		/* Set userdata SGPRs for merged LS-HS. */
 		radeon_set_sh_reg_seq(cs,
 				      R_00B430_SPI_SHADER_USER_DATA_LS_0 +
 				      GFX9_SGPR_TCS_OFFCHIP_LAYOUT * 4, 3);
-- 
2.20.1