[Mesa-dev] [PATCH 1/3] winsys/amdgpu: report a CS rejection as a reset only if there's no GPU reset

[Marek Olšák]

From: Marek Olšák <marek.olsak at amd.com>

---
 src/gallium/winsys/amdgpu/drm/amdgpu_cs.c | 11 +++++------
 1 file changed, 5 insertions(+), 6 deletions(-)

diff --git a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
index 4a2377f7e09..5b840caf885 100644
--- a/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
+++ b/src/gallium/winsys/amdgpu/drm/amdgpu_cs.c
@@ -337,42 +337,41 @@ static void amdgpu_ctx_destroy(struct radeon_winsys_ctx *rwctx)
    amdgpu_ctx_unref((struct amdgpu_ctx*)rwctx);
 }
 
 static enum pipe_reset_status
 amdgpu_ctx_query_reset_status(struct radeon_winsys_ctx *rwctx)
 {
    struct amdgpu_ctx *ctx = (struct amdgpu_ctx*)rwctx;
    uint32_t result, hangs;
    int r;
 
-   /* Return a failure due to a rejected command submission. */
-   if (ctx->ws->num_total_rejected_cs > ctx->initial_num_total_rejected_cs) {
-      return ctx->num_rejected_cs ? PIPE_GUILTY_CONTEXT_RESET :
-                                    PIPE_INNOCENT_CONTEXT_RESET;
-   }
-
    /* Return a failure due to a GPU hang. */
    r = amdgpu_cs_query_reset_state(ctx->ctx, &result, &hangs);
    if (r) {
       fprintf(stderr, "amdgpu: amdgpu_cs_query_reset_state failed. (%i)\n", r);
       return PIPE_NO_RESET;
    }
 
    switch (result) {
    case AMDGPU_CTX_GUILTY_RESET:
       return PIPE_GUILTY_CONTEXT_RESET;
    case AMDGPU_CTX_INNOCENT_RESET:
       return PIPE_INNOCENT_CONTEXT_RESET;
    case AMDGPU_CTX_UNKNOWN_RESET:
       return PIPE_UNKNOWN_CONTEXT_RESET;
    case AMDGPU_CTX_NO_RESET:
    default:
+      /* Return a failure due to a rejected command submission. */
+      if (ctx->ws->num_total_rejected_cs > ctx->initial_num_total_rejected_cs) {
+         return ctx->num_rejected_cs ? PIPE_GUILTY_CONTEXT_RESET :
+                                       PIPE_INNOCENT_CONTEXT_RESET;
+      }
       return PIPE_NO_RESET;
    }
 }
 
 /* COMMAND SUBMISSION */
 
 static bool amdgpu_cs_has_user_fence(struct amdgpu_cs_context *cs)
 {
    return cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_UVD &&
           cs->ib[IB_MAIN].ip_type != AMDGPU_HW_IP_VCE &&
-- 
2.17.1