[Mesa-dev] Profile-guides optimizations
Marek Olšák
maraeo at gmail.com
Thu Feb 13 22:22:20 UTC 2020
I wonder what PGO really does other than placing likely/unlikely.
Marek
On Thu., Feb. 13, 2020, 13:43 Dylan Baker, <dylan at pnwbakers.com> wrote:
> I actually spent a bunch of time toying with PGO a couple of years ago. I
> got
> the guidance all working and was able to train it, but what we found was
> that it
> made the specific workloads we threw at it much faster, but it made every
> real
> world use case I tried (playing a game, running piglit, gnome) slower,
> often
> significantly so.
>
> The hard part is not setting up pgo, it's getting the right training data.
>
> Dylan
>
> Quoting Marek Olšák (2020-02-13 10:30:46)
> > [Forked from the other thread]
> >
> > Guys, we could run some simple tests similar to piglit/drawoverhead as
> the last
> > step of the pgo=generate build. Tests like that should exercise the most
> common
> > codepaths in drivers. We could add subtests that we care about the most.
> >
> > Marek
> >
> > On Thu., Feb. 13, 2020, 13:16 Dylan Baker, <dylan at pnwbakers.com> wrote:
> >
> > meson has buildtins for both of these, -Db_lto=true turns on lto,
> for pgo
> > you
> > would run:
> >
> > meson build -Db_pgo=generate
> > ninja -C build
> > <run whatever guidance you want>
> > meson configure build -Db_pgo=use
> > ninja -C build
> >
> > Quoting Marek Olšák (2020-02-12 10:46:12)
> > > How do you enable LTO+PGO? Is it something we could enable by
> default for
> > > release builds?
> > >
> > > Marek
> > >
> > > On Wed, Feb 12, 2020 at 1:56 AM Dieter Nützel <
> Dieter at nuetzel-hh.de>
> > wrote:
> > >
> > > Hello Gert,
> > >
> > > your merge 'broke' LTO and then later on PGO
> compilation/linking.
> > >
> > > I do generally compiling with '-Dgallium-drivers=
> > r600,radeonsi,swrast'
> > > for testing radeonsi and (your) r600 work. ;-)
> > >
> > > After your merge I get several warnings in 'addrlib' with LTO
> and
> > even a
> > > compiler error (gcc (SUSE Linux) 9.2.1 20200128).
> > >
> > > I had to disable 'r600' ('swrast' is needed for 'nine') to get
> a
> > working
> > > LTO and even better PGO radeonsi driver.
> > > I'm preparing GREAT LTO+PGO (the later is the greater) numbers
> over
> > the
> > > last 2 months. I'll send my results later, today.
> > >
> > > Summary
> > > radeonsi is ~40% smaller and 16-20% faster with PGO (!!!).
> > >
> > > Honza and the GCC people (Intel's ICC folks) do GREAT things.
> > > 'glmark2' numbers are better then 'vkmark'. (Hello, Marek.).
> > >
> > > Need some sleep.
> > >
> > > See my log, below.
> > >
> > > Greetings and GREAT work!
> > >
> > > -Dieter
> > >
> > > Am 09.02.2020 15:46, schrieb Gert Wollny:
> > > > Am Donnerstag, den 23.01.2020, 20:31 +0100 schrieb Gert
> Wollny:
> > > >> has anybody any objections if I merge the r600/NIR code?
> > > >> Without explicitely setting the debug flag it doesn't
> change a
> > > >> thing, but it would be better to continue developing
> in-tree.
> > > > Okay, if nobody objects, I'll merge it Monday evening.
> > > >
> > > > Best,
> > > > Gert
> > >
> > > [1425/1433] Linking target
> src/gallium/targets/dri/libgallium_dri.so.
> > > FAILED: src/gallium/targets/dri/libgallium_dri.so
> > > c++ -o src/gallium/targets/dri/libgallium_dri.so
> > > 'src/gallium/targets/dri/8381c20@@gallium_dri at sha/target.c.o'
> -flto
> > > -fprofile-generate -Wl,--as-needed -Wl,--no-undefined -Wl,-O1
> -shared
> > > -fPIC -Wl,--start-group -Wl,-soname,libgallium_dri.so
> > > src/mesa/libmesa_gallium.a src/mesa/libmesa_common.a
> > > src/compiler/glsl/libglsl.a src/compiler/glsl/glcpp/libglcpp.a
> > > src/util/libmesa_util.a src/util/format/libmesa_format.a
> > > src/compiler/nir/libnir.a src/compiler/libcompiler.a
> > > src/mesa/libmesa_sse41.a
> src/mesa/drivers/dri/common/libdricommon.a
> > > src/mesa/drivers/dri/common/libmegadriver_stub.a
> > > src/gallium/state_trackers/dri/libdri.a
> > > src/gallium/auxiliary/libgalliumvl.a src/gallium/auxiliary/
> > libgallium.a
> > > src/mapi/shared-glapi/libglapi.so.0.0.0
> > > src/gallium/auxiliary/pipe-loader/libpipe_loader_static.a
> > > src/loader/libloader.a src/util/libxmlconfig.a
> > > src/gallium/winsys/sw/null/libws_null.a
> > > src/gallium/winsys/sw/wrapper/libwsw.a
> > > src/gallium/winsys/sw/dri/libswdri.a
> > > src/gallium/winsys/sw/kms-dri/libswkmsdri.a
> > > src/gallium/drivers/llvmpipe/libllvmpipe.a
> > > src/gallium/drivers/softpipe/libsoftpipe.a
> > > src/gallium/drivers/r600/libr600.a
> > > src/gallium/winsys/radeon/drm/libradeonwinsys.a
> > > src/gallium/drivers/radeonsi/libradeonsi.a
> > > src/gallium/winsys/amdgpu/drm/libamdgpuwinsys.a
> > > src/amd/addrlib/libaddrlib.a src/amd/common/libamd_common.a
> > > src/amd/llvm/libamd_common_llvm.a -Wl,--build-id=sha1
> > -Wl,--gc-sections
> > > -Wl,--version-script /opt/mesa/src/gallium/targets/dri/dri.sym
> > > -Wl,--dynamic-list
> /opt/mesa/src/gallium/targets/dri/../dri-vdpau.dyn
> > > /usr/lib64/libdrm.so -L/usr/local/lib -lLLVM-10git -pthread
> > > /usr/lib64/libexpat.so
> > > /usr/lib64/gcc/x86_64-suse-linux/9/../../../../lib64/libz.so
> -lm
> > > /usr/lib64/gcc/x86_64-suse-linux/9/../../../../lib64/libzstd.so
> > > -L/usr/local/lib -lLLVM-10git /usr/lib64/libunwind.so -ldl
> -lsensors
> > > -L/usr/local/lib -lLLVM-10git /usr/lib64/libdrm_radeon.so
> > > /usr/lib64/libelf.so -L/usr/local/lib -lLLVM-10git
> -L/usr/local/lib
> > > -lLLVM-10git -L/usr/local/lib -lLLVM-10git /usr/lib64/
> > libdrm_amdgpu.so
> > > -L/usr/local/lib -lLLVM-10git -Wl,--end-group
> > > '-Wl,-rpath,$ORIGIN/../../../mesa:$ORIGIN/../../../compiler/
> > glsl:$ORIGIN/..
> > >
> /../../compiler/glsl/glcpp:$ORIGIN/../../../util:$ORIGIN/../../../
> > util/
> > > format:$ORIGIN/../../../compiler/nir:$ORIGIN/../../../
> > compiler:$ORIGIN/..
> > > /../../mesa/drivers/dri/common:$ORIGIN/../../state_trackers/
> > dri:$ORIGIN/..
> > > /../auxiliary:$ORIGIN/../../../mapi/shared-glapi:$ORIGIN/../../
> > auxiliary/
> > > pipe-loader:$ORIGIN/../../../loader:$ORIGIN/../../winsys/sw/
> > null:$ORIGIN/..
> > >
> /../winsys/sw/wrapper:$ORIGIN/../../winsys/sw/dri:$ORIGIN/../../
> > winsys/sw/
> > > kms-dri:$ORIGIN/../../drivers/llvmpipe:$ORIGIN/../../drivers/
> > >
> softpipe:$ORIGIN/../../drivers/r600:$ORIGIN/../../winsys/radeon/
> > drm:$ORIGIN
> > >
> /../../drivers/radeonsi:$ORIGIN/../../winsys/amdgpu/drm:$ORIGIN/../..
> > /../
> > >
> amd/addrlib:$ORIGIN/../../../amd/common:$ORIGIN/../../../amd/llvm'
> > > -Wl,-rpath-link,/opt/mesa/build/src/mesa
> > > -Wl,-rpath-link,/opt/mesa/build/src/compiler/glsl
> > > -Wl,-rpath-link,/opt/mesa/build/src/compiler/glsl/glcpp
> > > -Wl,-rpath-link,/opt/mesa/build/src/util
> > > -Wl,-rpath-link,/opt/mesa/build/src/util/format
> > > -Wl,-rpath-link,/opt/mesa/build/src/compiler/nir
> > > -Wl,-rpath-link,/opt/mesa/build/src/compiler
> > > -Wl,-rpath-link,/opt/mesa/build/src/mesa/drivers/dri/common
> > > -Wl,-rpath-link,/opt/mesa/build/src/gallium/state_trackers/dri
> > > -Wl,-rpath-link,/opt/mesa/build/src/gallium/auxiliary
> > > -Wl,-rpath-link,/opt/mesa/build/src/mapi/shared-glapi
> > >
> -Wl,-rpath-link,/opt/mesa/build/src/gallium/auxiliary/pipe-loader
> > > -Wl,-rpath-link,/opt/mesa/build/src/loader
> > > -Wl,-rpath-link,/opt/mesa/build/src/gallium/winsys/sw/null
> > > -Wl,-rpath-link,/opt/mesa/build/src/gallium/winsys/sw/wrapper
> > > -Wl,-rpath-link,/opt/mesa/build/src/gallium/winsys/sw/dri
> > > -Wl,-rpath-link,/opt/mesa/build/src/gallium/winsys/sw/kms-dri
> > > -Wl,-rpath-link,/opt/mesa/build/src/gallium/drivers/llvmpipe
> > > -Wl,-rpath-link,/opt/mesa/build/src/gallium/drivers/softpipe
> > > -Wl,-rpath-link,/opt/mesa/build/src/gallium/drivers/r600
> > > -Wl,-rpath-link,/opt/mesa/build/src/gallium/winsys/radeon/drm
> > > -Wl,-rpath-link,/opt/mesa/build/src/gallium/drivers/radeonsi
> > > -Wl,-rpath-link,/opt/mesa/build/src/
> > > gallium/winsys/amdgpu/drm
> > > -Wl,-rpath-link,/opt/mesa/build/src/amd/addrlib
> > > -Wl,-rpath-link,/opt/mesa/build/src/amd/common
> > > -Wl,-rpath-link,/opt/mesa/build/src/amd/llvm
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: warning:
> type
> > > ‘struct <anon>’ violates the C++ One Definition Rule [-Wodr]
> > > 49 | struct {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: a
> > different
> > > type is defined in another translation unit
> > > 51 | {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:54:33: note:
> the first
> > > difference of corresponding definitions is field
> > ‘BANK_INTERLEAVE_SIZE’
> > > 54 | unsigned int BANK_INTERLEAVE_SIZE
> : 3;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:56:44: note:
> a field
> > > with different name is defined in another translation unit
> > > 56 | unsigned int NUM_PKRS
> : 3;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:48:7: warning:
> type
> > > ‘union GB_ADDR_CONFIG’ violates the C++ One Definition Rule
> [-Wodr]
> > > 48 | union GB_ADDR_CONFIG {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:48:7: note: a
> > different
> > > type is defined in another translation unit
> > > 48 | union GB_ADDR_CONFIG
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:83:7: note: the
> first
> > > difference of corresponding definitions is field ‘bitfields’
> > > 83 | } bitfields, bits;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:65:7: note: a
> field
> > of
> > > same name but different type is defined in another translation
> unit
> > > 65 | } bitfields, bits;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: note:
> type
> > ‘struct
> > > <anon>’ itself violates the C++ One Definition Rule
> > > 49 | struct {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note:
> the
> > > incompatible type is defined here
> > > 51 | {
> > > | ^
> > > during IPA pass: materialize-all-clones
> > > In function ‘operator<<.constprop’:
> > > lto1: internal compiler error: in
> cgraph_add_edge_to_call_site_hash,
> > at
> > > cgraph.c:719
> > > Please submit a full bug report,
> > > with preprocessed source if appropriate.
> > > See <https://bugs.opensuse.org/> for instructions.
> > > lto-wrapper: fatal error: c++ returned 1 exit status
> > > compilation terminated.
> > >
> /usr/lib64/gcc/x86_64-suse-linux/9/../../../../x86_64-suse-linux/bin/
> > ld:
> > > error: lto-wrapper failed
> > > collect2: error: ld returned 1 exit status
> > > [1429/1433] Linking target
> > > src/gallium/targets/pipe-loader/pipe_radeonsi.so.
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: warning:
> type
> > > ‘struct <anon>’ violates the C++ One Definition Rule [-Wodr]
> > > 49 | struct {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: a
> > different
> > > type is defined in another translation unit
> > > 51 | {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:54:33: note:
> the first
> > > difference of corresponding definitions is field
> > ‘BANK_INTERLEAVE_SIZE’
> > > 54 | unsigned int BANK_INTERLEAVE_SIZE
> : 3;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:56:44: note:
> a field
> > > with different name is defined in another translation unit
> > > 56 | unsigned int NUM_PKRS
> : 3;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:48:7: warning:
> type
> > > ‘union GB_ADDR_CONFIG’ violates the C++ One Definition Rule
> [-Wodr]
> > > 48 | union GB_ADDR_CONFIG {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:48:7: note: a
> > different
> > > type is defined in another translation unit
> > > 48 | union GB_ADDR_CONFIG
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:83:7: note: the
> first
> > > difference of corresponding definitions is field ‘bitfields’
> > > 83 | } bitfields, bits;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:65:7: note: a
> field
> > of
> > > same name but different type is defined in another translation
> unit
> > > 65 | } bitfields, bits;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: note:
> type
> > ‘struct
> > > <anon>’ itself violates the C++ One Definition Rule
> > > 49 | struct {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note:
> the
> > > incompatible type is defined here
> > > 51 | {
> > > | ^
> > > [1430/1433] Linking target
> > > src/gallium/targets/va/libgallium_drv_video.so.
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: warning:
> type
> > > ‘struct <anon>’ violates the C++ One Definition Rule [-Wodr]
> > > 49 | struct {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: a
> > different
> > > type is defined in another translation unit
> > > 51 | {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:54:33: note:
> the first
> > > difference of corresponding definitions is field
> > ‘BANK_INTERLEAVE_SIZE’
> > > 54 | unsigned int BANK_INTERLEAVE_SIZE
> : 3;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:56:44: note:
> a field
> > > with different name is defined in another translation unit
> > > 56 | unsigned int NUM_PKRS
> : 3;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:48:7: warning:
> type
> > > ‘union GB_ADDR_CONFIG’ violates the C++ One Definition Rule
> [-Wodr]
> > > 48 | union GB_ADDR_CONFIG {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:48:7: note: a
> > different
> > > type is defined in another translation unit
> > > 48 | union GB_ADDR_CONFIG
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:83:7: note: the
> first
> > > difference of corresponding definitions is field ‘bitfields’
> > > 83 | } bitfields, bits;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:65:7: note: a
> field
> > of
> > > same name but different type is defined in another translation
> unit
> > > 65 | } bitfields, bits;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: note:
> type
> > ‘struct
> > > <anon>’ itself violates the C++ One Definition Rule
> > > 49 | struct {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note:
> the
> > > incompatible type is defined here
> > > 51 | {
> > > | ^
> > > [1431/1433] Linking target
> > > src/gallium/targets/vdpau/libvdpau_gallium.so.1.0.0.
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: warning:
> type
> > > ‘struct <anon>’ violates the C++ One Definition Rule [-Wodr]
> > > 49 | struct {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: a
> > different
> > > type is defined in another translation unit
> > > 51 | {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:54:33: note:
> the first
> > > difference of corresponding definitions is field
> > ‘BANK_INTERLEAVE_SIZE’
> > > 54 | unsigned int BANK_INTERLEAVE_SIZE
> : 3;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:56:44: note:
> a field
> > > with different name is defined in another translation unit
> > > 56 | unsigned int NUM_PKRS
> : 3;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:48:7: warning:
> type
> > > ‘union GB_ADDR_CONFIG’ violates the C++ One Definition Rule
> [-Wodr]
> > > 48 | union GB_ADDR_CONFIG {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:48:7: note: a
> > different
> > > type is defined in another translation unit
> > > 48 | union GB_ADDR_CONFIG
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:83:7: note: the
> first
> > > difference of corresponding definitions is field ‘bitfields’
> > > 83 | } bitfields, bits;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:65:7: note: a
> field
> > of
> > > same name but different type is defined in another translation
> unit
> > > 65 | } bitfields, bits;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: note:
> type
> > ‘struct
> > > <anon>’ itself violates the C++ One Definition Rule
> > > 49 | struct {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note:
> the
> > > incompatible type is defined here
> > > 51 | {
> > > | ^
> > > [1432/1433] Linking target src/amd/vulkan/libvulkan_radeon.so.
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: warning:
> type
> > > ‘struct <anon>’ violates the C++ One Definition Rule [-Wodr]
> > > 49 | struct {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: a
> > different
> > > type is defined in another translation unit
> > > 51 | {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:54:33: note:
> the first
> > > difference of corresponding definitions is field
> > ‘BANK_INTERLEAVE_SIZE’
> > > 54 | unsigned int BANK_INTERLEAVE_SIZE
> : 3;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:56:44: note:
> a field
> > > with different name is defined in another translation unit
> > > 56 | unsigned int NUM_PKRS
> : 3;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:48:7: warning:
> type
> > > ‘union GB_ADDR_CONFIG’ violates the C++ One Definition Rule
> [-Wodr]
> > > 48 | union GB_ADDR_CONFIG {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:48:7: note: a
> > different
> > > type is defined in another translation unit
> > > 48 | union GB_ADDR_CONFIG
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:83:7: note: the
> first
> > > difference of corresponding definitions is field ‘bitfields’
> > > 83 | } bitfields, bits;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:65:7: note: a
> field
> > of
> > > same name but different type is defined in another translation
> unit
> > > 65 | } bitfields, bits;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: note:
> type
> > ‘struct
> > > <anon>’ itself violates the C++ One Definition Rule
> > > 49 | struct {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note:
> the
> > > incompatible type is defined here
> > > 51 | {
> > > | ^
> > > [1433/1433] Linking target
> > > src/gallium/targets/d3dadapter9/d3dadapter9.so.1.0.0.
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: warning:
> type
> > > ‘struct <anon>’ violates the C++ One Definition Rule [-Wodr]
> > > 49 | struct {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note: a
> > different
> > > type is defined in another translation unit
> > > 51 | {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:54:33: note:
> the first
> > > difference of corresponding definitions is field
> > ‘BANK_INTERLEAVE_SIZE’
> > > 54 | unsigned int BANK_INTERLEAVE_SIZE
> : 3;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:56:44: note:
> a field
> > > with different name is defined in another translation unit
> > > 56 | unsigned int NUM_PKRS
> : 3;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:48:7: warning:
> type
> > > ‘union GB_ADDR_CONFIG’ violates the C++ One Definition Rule
> [-Wodr]
> > > 48 | union GB_ADDR_CONFIG {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:48:7: note: a
> > different
> > > type is defined in another translation unit
> > > 48 | union GB_ADDR_CONFIG
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:83:7: note: the
> first
> > > difference of corresponding definitions is field ‘bitfields’
> > > 83 | } bitfields, bits;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:65:7: note: a
> field
> > of
> > > same name but different type is defined in another translation
> unit
> > > 65 | } bitfields, bits;
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx9/gfx9_gb_reg.h:49:12: note:
> type
> > ‘struct
> > > <anon>’ itself violates the C++ One Definition Rule
> > > 49 | struct {
> > > | ^
> > > ../src/amd/addrlib/src/chip/gfx10/gfx10_gb_reg.h:51:5: note:
> the
> > > incompatible type is defined here
> > > 51 | {
> > > | ^
> > > ninja: build stopped: subcommand failed.
> > > 3123.512u 166.581s 9:24.69 582.6% 0+0k 16+7235672io
> 0pf+0w
> > >
> >
>
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