[Mesa-stable] [PATCH] i965/fbo: Only try stencil meta blits on gen >= 8
Topi Pohjolainen
topi.pohjolainen at intel.com
Mon May 19 00:10:33 PDT 2014
I don't have an ILK at hand but the fix should be trivial.
Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=78872
Cc: "10.2" <mesa-stable at lists.freedesktop.org>
Signed-off-by: Topi Pohjolainen <topi.pohjolainen at intel.com>
---
src/mesa/drivers/dri/i965/intel_fbo.c | 6 ++++--
1 file changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/mesa/drivers/dri/i965/intel_fbo.c b/src/mesa/drivers/dri/i965/intel_fbo.c
index 5ff4263..6c99de9 100644
--- a/src/mesa/drivers/dri/i965/intel_fbo.c
+++ b/src/mesa/drivers/dri/i965/intel_fbo.c
@@ -865,6 +865,8 @@ intel_blit_framebuffer(struct gl_context *ctx,
GLint dstX0, GLint dstY0, GLint dstX1, GLint dstY1,
GLbitfield mask, GLenum filter)
{
+ struct brw_context *brw = brw_context(ctx);
+
/* Page 679 of OpenGL 4.4 spec says:
* "Added BlitFramebuffer to commands affected by conditional rendering in
* section 10.10 (Bug 9562)."
@@ -872,14 +874,14 @@ intel_blit_framebuffer(struct gl_context *ctx,
if (!_mesa_check_conditional_render(ctx))
return;
- mask = brw_blorp_framebuffer(brw_context(ctx),
+ mask = brw_blorp_framebuffer(brw,
srcX0, srcY0, srcX1, srcY1,
dstX0, dstY0, dstX1, dstY1,
mask, filter);
if (mask == 0x0)
return;
- if (mask & GL_STENCIL_BUFFER_BIT) {
+ if (brw->gen >= 8 && (mask & GL_STENCIL_BUFFER_BIT)) {
brw_meta_fbo_stencil_blit(brw_context(ctx),
srcX0, srcY0, srcX1, srcY1,
dstX0, dstY0, dstX1, dstY1);
--
1.8.3.1
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