[Mesa-stable] [Mesa-dev] [PATCH] nvc0: increase texture buffer object alignment to 256 for pre-GM107
Samuel Pitoiset
samuel.pitoiset at gmail.com
Mon Apr 10 12:37:38 UTC 2017
On 04/10/2017 02:33 PM, Ilia Mirkin wrote:
> I assume Pascal is the same as Maxwell. Using tic, it gets 16...
Makes sense.
Reviewed-by: Samuel Pitoiset <samuel.pitoiset at gmail.com>
>
> On Apr 10, 2017 5:32 AM, "Samuel Pitoiset" <samuel.pitoiset at gmail.com
> <mailto:samuel.pitoiset at gmail.com>> wrote:
>
> How about Pascal?
>
> On 04/08/2017 09:10 PM, Ilia Mirkin wrote:
>
> We currently don't pass the low byte of the address via the surface
> info, so in order to work with images, these have to implicitly be
> aligned to 256. The proprietary driver also doesn't go out of
> its way to
> provide lower alignment.
>
> Fixes GL45-CTS.texture_buffer.texture_buffer_texture_buffer_range
>
> Signed-off-by: Ilia Mirkin <imirkin at alum.mit.edu
> <mailto:imirkin at alum.mit.edu>>
> Cc: mesa-stable at lists.freedesktop.org
> <mailto:mesa-stable at lists.freedesktop.org>
> ---
> src/gallium/drivers/nouveau/nvc0/nvc0_screen.c | 2 +-
> 1 file changed, 1 insertion(+), 1 deletion(-)
>
> diff --git a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> index 543857a..fc44d32 100644
> --- a/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> +++ b/src/gallium/drivers/nouveau/nvc0/nvc0_screen.c
> @@ -147,7 +147,7 @@ nvc0_screen_get_param(struct pipe_screen
> *pscreen, enum pipe_cap param)
> case PIPE_CAP_CONSTANT_BUFFER_OFFSET_ALIGNMENT:
> return 256;
> case PIPE_CAP_TEXTURE_BUFFER_OFFSET_ALIGNMENT:
> - if (class_3d < NVE4_3D_CLASS)
> + if (class_3d < GM107_3D_CLASS)
> return 256; /* IMAGE bindings require alignment to
> 256 */
> return 16;
> case PIPE_CAP_SHADER_BUFFER_OFFSET_ALIGNMENT:
>
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