[Mesa-stable] [PATCH] i965/vec4: Use reads_accumulator_implicitly(), not MACH checks.

[Francisco Jerez]

Kenneth Graunke <kenneth at whitecape.org> writes:

> Curro pointed out that I should not just check for MACH, but use
> the reads_accumulator_implicitly() helper, which would also prevent
> the same bug with MAC and SADA2 (if we ever decide to use them).
>
> Cc: Francisco Jerez <currojerez at riseup.net>
> Cc: mesa-stable at lists.freedesktop.org

Thanks Ken, patch is:

Reviewed-by: Francisco Jerez <currojerez at riseup.net>

> ---
>  src/intel/compiler/brw_vec4.cpp | 8 ++++----
>  1 file changed, 4 insertions(+), 4 deletions(-)
>
> Curro - sorry, I already pushed the MACH patch...but I agree with your
> feedback, so here it is as a follow-up patch :)
>
> Emil - you'll need to cherry-pick 9347acac440190af67fce7b5f28e8eee7245fb6d
> before picking this patch.  I forgot to nominate it for stable, sorry!
>
> diff --git a/src/intel/compiler/brw_vec4.cpp b/src/intel/compiler/brw_vec4.cpp
> index 4bb774bf10e..0909ddb5861 100644
> --- a/src/intel/compiler/brw_vec4.cpp
> +++ b/src/intel/compiler/brw_vec4.cpp
> @@ -1071,11 +1071,11 @@ vec4_instruction::can_reswizzle(const struct gen_device_info *devinfo,
>     if (devinfo->gen == 6 && is_math() && swizzle != BRW_SWIZZLE_XYZW)
>        return false;
>  
> -   /* Don't touch MACH - it uses the accumulator results from an earlier
> -    * MUL - so we'd need to reswizzle both.  We don't do that, so just
> -    * avoid it entirely.
> +   /* We can't swizzle implicit accumulator access.  We'd have to
> +    * reswizzle the producer of the accumulator value in addition
> +    * to the consumer (i.e. both MUL and MACH).  Just skip this.
>      */
> -   if (opcode == BRW_OPCODE_MACH)
> +   if (reads_accumulator_implicitly())
>        return false;
>  
>     if (!can_do_writemask(devinfo) && dst_writemask != WRITEMASK_XYZW)
> -- 
> 2.12.2
>
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