[Mesa-stable] [Mesa-dev] [PATCH 7/7] i965/fs: add support for int64 to bool conversion

[Jason Ekstrand]

These all need to go into 17.0

On Feb 8, 2017 06:59, "Samuel Iglesias Gonsálvez" <siglesias at igalia.com>
wrote:

> Signed-off-by: Samuel Iglesias Gonsálvez <siglesias at igalia.com>
> Bugzilla: https://bugs.freedesktop.org/show_bug.cgi?id=99660
> ---
>  src/mesa/drivers/dri/i965/brw_fs_nir.cpp | 15 +++++++++++++--
>  1 file changed, 13 insertions(+), 2 deletions(-)
>
> diff --git a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> index 76887a9e3eb..991c20fad62 100644
> --- a/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> +++ b/src/mesa/drivers/dri/i965/brw_fs_nir.cpp
> @@ -1094,15 +1094,26 @@ fs_visitor::nir_emit_alu(const fs_builder &bld,
> nir_alu_instr *instr)
>     case nir_op_f2b:
>        bld.CMP(result, op[0], brw_imm_f(0.0f), BRW_CONDITIONAL_NZ);
>        break;
> +
> +   case nir_op_i642b:
>     case nir_op_d2b: {
>        /* two-argument instructions can't take 64-bit immediates */
> -      fs_reg zero = vgrf(glsl_type::double_type);
> +      fs_reg zero;
> +      fs_reg tmp;
> +
> +      if (instr->op == nir_op_d2b) {
> +         zero = vgrf(glsl_type::double_type);
> +         tmp = vgrf(glsl_type::double_type);
> +      } else {
> +         zero = vgrf(glsl_type::int64_t_type);
> +         tmp = vgrf(glsl_type::int64_t_type);
> +      }
> +
>        bld.MOV(zero, setup_imm_df(bld, 0.0));
>        /* A SIMD16 execution needs to be split in two instructions, so use
>         * a vgrf instead of the flag register as dst so instruction
> splitting
>         * works
>         */
> -      fs_reg tmp = vgrf(glsl_type::double_type);
>        bld.CMP(tmp, op[0], zero, BRW_CONDITIONAL_NZ);
>        bld.MOV(result, subscript(tmp, BRW_REGISTER_TYPE_UD, 0));
>        break;
> --
> 2.11.0
>
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