[Nouveau] Interrupt setting

[Shinpei KATO]

Dear Luca,

Thank you for your explanation from another point of view.

> > So a GPU itself updates the sequence # of each fence in a specific register,
> > and we can let the Nouveau driver wait for a target
> > value to be written.
> > Do you know when the value is actually written?
> 
> When the FIFO command instructing the GPU to do the write is executed.

Ok, I think I was misunderstanding.
This means we have to tell a GPU by sending another command to increment a fence
value.
Finally I believe I am correct ;-)

> > If it is written when a "DMA transfer" is done, we dont know exactly when
> > the corresponding GPU operation is finished.
> > Do you think it is possible to wait for a completion of a "GPU operation"?
> 
> The current assumption is that FIFO commands are executed
> synchronously, so when the FIFO executes the command to update the
> fence value, all previous FIFO commands should have been completed.
> 
> The current driver just does a CPU busy loop, continuously reading the
> fence register until the value read is large enough.

I see, if the assumption is correct, the fence value is written after the "last
GPU operation" is completed.
On the other hand, this means that, for now in Nouveau, we dont have a way to
tell a GPU to notify us of a completion of a DMA transfer.
Maybe an interrupt from a GPU (PGRAPH_BUFFER_NOTIFY or something) is needed for
this.
I understand this notification is not necessary now, because DMA transactions
are managed by ring buffers.

> There should be some work by Francisco Jerez and perhaps Ben Skeggs on
> using an interrupt-based mechanism instead (the one you described,
> most likely), but I'm not sure what the status of that is.

Yeah I read some discusson in previous messages regarding race condition.
They say that we dont want to be interrupted every time a fence is executed, but
only when a cerntain fence is executed.
Look forward to updates.

Best,
- Shinpei