[Openchrome-devel] drm-openchrome: Branch 'drm-next-3.19' - 9 commits - drivers/gpu/drm
Kevin Brace
kevinbrace at kemper.freedesktop.org
Mon Dec 18 19:39:58 UTC 2017
drivers/gpu/drm/openchrome/crtc_hw.h | 44 ++++
drivers/gpu/drm/openchrome/via_crtc.c | 280 ++++++++++++++++++++----------
drivers/gpu/drm/openchrome/via_disp_reg.h | 39 +++-
drivers/gpu/drm/openchrome/via_drv.c | 6
drivers/gpu/drm/openchrome/via_drv.h | 4
drivers/gpu/drm/openchrome/via_fb.c | 4
drivers/gpu/drm/openchrome/via_ttm.c | 22 +-
7 files changed, 281 insertions(+), 118 deletions(-)
New commits:
commit be6be4c77aca52d60a50e4e77b31f593dade15f4
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Mon Dec 18 13:33:35 2017 -0600
drm/openchrome: Version bumped to 3.0.61
Added code to properly support CLE266 chipset IGA1. A small adjustment
for KM400 chipset. CLE266 chipset IGA2 support will be coming up shortly.
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_drv.h b/drivers/gpu/drm/openchrome/via_drv.h
index 8f7d014903a7..52d248d41959 100644
--- a/drivers/gpu/drm/openchrome/via_drv.h
+++ b/drivers/gpu/drm/openchrome/via_drv.h
@@ -30,11 +30,11 @@
#define DRIVER_AUTHOR "OpenChrome Project"
#define DRIVER_NAME "openchrome"
#define DRIVER_DESC "OpenChrome DRM for VIA Technologies Chrome IGP"
-#define DRIVER_DATE "20171216"
+#define DRIVER_DATE "20171218"
#define DRIVER_MAJOR 3
#define DRIVER_MINOR 0
-#define DRIVER_PATCHLEVEL 60
+#define DRIVER_PATCHLEVEL 61
#include <linux/module.h>
commit 31141279f87a5b064057a0421eaea0c745e0e1f9
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Mon Dec 18 13:30:34 2017 -0600
drm/openchrome: Small adjustment to KM400 IGA1 display FIFO settings
CLE266 and KM400 chipsets have many similarities in the way the
hardware is built.
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index 2de8dd2c7669..61c0a902da75 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -712,7 +712,8 @@ static void via_iga1_display_fifo_regs(struct drm_device *dev,
break;
}
- if (dev->pdev->device == PCI_DEVICE_ID_VIA_CLE266) {
+ if ((dev->pdev->device == PCI_DEVICE_ID_VIA_CLE266) ||
+ (dev->pdev->device == PCI_DEVICE_ID_VIA_KM400)) {
/* Force PREQ to be always higer than TREQ. */
svga_wseq_mask(VGABASE, 0x18, BIT(6), BIT(6));
}
commit e711bee5439c28f248ed473dd882c945a1ba92bd
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Mon Dec 18 13:19:53 2017 -0600
drm/openchrome: Set CLE266 chipset IGA1 display FIFO
The code to set CLE266 chipset IGA1 display FIFO has been missing, and
this leads to various undesirable effects (i.e., temporary display
artifacts). The added code supports both CLE266 chipset Revision A and
Revision C. The code to handle this was ported from VIA Technologies
Chrome IGP open source DDX device driver.
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index 75bf6ec0ca85..2de8dd2c7669 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -490,6 +490,118 @@ static void via_iga1_display_fifo_regs(struct drm_device *dev,
DRM_DEBUG_KMS("Entered %s.\n", __func__);
switch (dev->pdev->device) {
+ case PCI_DEVICE_ID_VIA_CLE266:
+ if (dev_priv->revision == CLE266_REVISION_AX) {
+ if (mode->hdisplay > 1024) {
+ /* SR17[6:0] */
+ iga->fifo_max_depth = 192;
+
+ /* SR16[5:0] */
+ iga->fifo_threshold = 92;
+
+ /* SR18[5:0] */
+ iga->fifo_high_threshold = 92;
+ } else {
+ /* SR17[6:0] */
+ iga->fifo_max_depth = 128;
+
+ /* SR16[5:0] */
+ iga->fifo_threshold = 32;
+
+ /* SR18[5:0] */
+ iga->fifo_high_threshold = 56;
+ }
+
+ if (dev_priv->vram_type <= VIA_MEM_DDR_200) {
+ if (fb->bits_per_pixel == 32) {
+ if (mode->hdisplay > 1024) {
+ if (mode->vdisplay > 768) {
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 16;
+ } else {
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 12;
+ }
+ } else if (mode->hdisplay > 640) {
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 40;
+ } else {
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 124;
+ }
+ } else if (fb->bits_per_pixel == 16){
+ if (mode->hdisplay > 1400) {
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 16;
+ } else {
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 12;
+ }
+ } else {
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 124;
+ }
+ } else {
+ if (mode->hdisplay > 1280) {
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 16;
+ } else if (mode->hdisplay > 1024) {
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 12;
+ } else {
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 124;
+ }
+ }
+ /* dev_priv->revision == CLE266_REVISION_CX */
+ } else {
+ if (mode->hdisplay >= 1024) {
+ /* SR17[6:0] */
+ iga->fifo_max_depth = 256;
+
+ /* SR16[5:0] */
+ iga->fifo_threshold = 112;
+
+ /* SR18[5:0] */
+ iga->fifo_high_threshold = 92;
+ } else {
+ /* SR17[6:0] */
+ iga->fifo_max_depth = 128;
+
+ /* SR16[5:0] */
+ iga->fifo_threshold = 32;
+
+ /* SR18[5:0] */
+ iga->fifo_high_threshold = 56;
+ }
+
+ if (dev_priv->vram_type <= VIA_MEM_DDR_200) {
+ if (mode->hdisplay > 1024) {
+ if (mode->vdisplay > 768) {
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 16;
+ } else {
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 12;
+ }
+ } else if (mode->hdisplay > 640) {
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 40;
+ } else {
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 124;
+ }
+ } else {
+ if (mode->hdisplay >= 1280) {
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 16;
+ } else {
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 124;
+ }
+ }
+ }
+ break;
case PCI_DEVICE_ID_VIA_KM400:
if ((mode->hdisplay >= 1600) &&
(dev_priv->vram_type <= VIA_MEM_DDR_200)) {
@@ -600,6 +712,25 @@ static void via_iga1_display_fifo_regs(struct drm_device *dev,
break;
}
+ if (dev->pdev->device == PCI_DEVICE_ID_VIA_CLE266) {
+ /* Force PREQ to be always higer than TREQ. */
+ svga_wseq_mask(VGABASE, 0x18, BIT(6), BIT(6));
+ }
+
+ if ((dev->pdev->device == PCI_DEVICE_ID_VIA_CLE266) &&
+ (dev_priv->revision == CLE266_REVISION_AX) &&
+ (mode->hdisplay > 1024)) {
+ reg_value = VIA_READ(0x0298);
+ VIA_WRITE(0x0298, reg_value | 0x20000000);
+
+ /* Turn on IGA1 extended display FIFO. */
+ reg_value = VIA_READ(0x0230);
+ VIA_WRITE(0x0230, reg_value | 0x00200000);
+
+ reg_value = VIA_READ(0x0298);
+ VIA_WRITE(0x0298, reg_value & (~0x20000000));
+ }
+
/* If resolution > 1280x1024, expire length = 64, else
expire length = 128 */
if ((dev->pdev->device == PCI_DEVICE_ID_VIA_K8M800
@@ -1516,16 +1647,9 @@ via_iga1_crtc_mode_set(struct drm_crtc *crtc,
/* No HSYNC shift. */
via_iga1_set_hsync_shift(VGABASE, 0x05);
- /* Load FIFO */
- if (dev->pdev->device != PCI_DEVICE_ID_VIA_CLE266) {
- via_iga1_display_fifo_regs(dev, dev_priv, iga,
- adjusted_mode, crtc->primary->fb);
- } else if (adjusted_mode->hdisplay == 1024
- && adjusted_mode->vdisplay == 768) {
- /* Update Patch Register */
- svga_wseq_mask(VGABASE, 0x16, 0x0C, 0xBF);
- vga_wseq(VGABASE, 0x18, 0x4C);
- }
+ /* Load display FIFO. */
+ via_iga1_display_fifo_regs(dev, dev_priv, iga,
+ adjusted_mode, crtc->primary->fb);
/* Set PLL */
if (adjusted_mode->clock) {
@@ -2142,7 +2266,8 @@ via_crtc_init(struct drm_device *dev, int index)
iga->timings.vsync_end.regs = iga1_ver_sync_end;
/* Primary FIFO setup */
- if (dev->pdev->device == PCI_DEVICE_ID_VIA_KM400) {
+ if ((dev->pdev->device == PCI_DEVICE_ID_VIA_CLE266) ||
+ (dev->pdev->device == PCI_DEVICE_ID_VIA_KM400)) {
iga->fifo_depth.count = ARRAY_SIZE(iga1_cle266_fifo_depth_select);
iga->fifo_depth.regs = iga1_cle266_fifo_depth_select;
commit 6cbacdc50edd55fe9141c797b5cf6f91756171b7
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sun Dec 17 23:46:10 2017 -0600
drm/openchrome: Setting IGA1 display FIFO for CLE266 and KM400 chipsets
The bit fields are different from newer devices.
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index ff02f838cb7a..75bf6ec0ca85 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -2142,17 +2142,31 @@ via_crtc_init(struct drm_device *dev, int index)
iga->timings.vsync_end.regs = iga1_ver_sync_end;
/* Primary FIFO setup */
- iga->high_threshold.count = ARRAY_SIZE(iga1_fifo_high_threshold_select);
- iga->high_threshold.regs = iga1_fifo_high_threshold_select;
+ if (dev->pdev->device == PCI_DEVICE_ID_VIA_KM400) {
+ iga->fifo_depth.count = ARRAY_SIZE(iga1_cle266_fifo_depth_select);
+ iga->fifo_depth.regs = iga1_cle266_fifo_depth_select;
+
+ iga->threshold.count = ARRAY_SIZE(iga1_cle266_fifo_threshold_select);
+ iga->threshold.regs = iga1_cle266_fifo_threshold_select;
+
+ iga->high_threshold.count = ARRAY_SIZE(iga1_cle266_fifo_high_threshold_select);
+ iga->high_threshold.regs = iga1_cle266_fifo_high_threshold_select;
- iga->threshold.count = ARRAY_SIZE(iga1_fifo_threshold_select);
- iga->threshold.regs = iga1_fifo_threshold_select;
+ iga->display_queue.count = ARRAY_SIZE(iga1_cle266_display_queue_expire_num);
+ iga->display_queue.regs = iga1_cle266_display_queue_expire_num;
+ } else {
+ iga->fifo_depth.count = ARRAY_SIZE(iga1_k8m800_fifo_depth_select);
+ iga->fifo_depth.regs = iga1_k8m800_fifo_depth_select;
+
+ iga->threshold.count = ARRAY_SIZE(iga1_k8m800_fifo_threshold_select);
+ iga->threshold.regs = iga1_k8m800_fifo_threshold_select;
- iga->display_queue.count = ARRAY_SIZE(iga1_display_queue_expire_num);
- iga->display_queue.regs = iga1_display_queue_expire_num;
+ iga->high_threshold.count = ARRAY_SIZE(iga1_k8m800_fifo_high_threshold_select);
+ iga->high_threshold.regs = iga1_k8m800_fifo_high_threshold_select;
- iga->fifo_depth.count = ARRAY_SIZE(iga1_fifo_depth_select);
- iga->fifo_depth.regs = iga1_fifo_depth_select;
+ iga->display_queue.count = ARRAY_SIZE(iga1_k8m800_display_queue_expire_num);
+ iga->display_queue.regs = iga1_k8m800_display_queue_expire_num;
+ }
iga->fetch.count = ARRAY_SIZE(iga1_fetch_count);
iga->fetch.regs = iga1_fetch_count;
diff --git a/drivers/gpu/drm/openchrome/via_disp_reg.h b/drivers/gpu/drm/openchrome/via_disp_reg.h
index ada0880e8cfe..a8a27e2fb8ec 100644
--- a/drivers/gpu/drm/openchrome/via_disp_reg.h
+++ b/drivers/gpu/drm/openchrome/via_disp_reg.h
@@ -134,8 +134,13 @@
#define CN750_IGA2_DISPLAY_QUEUE_EXPIRE_NUM 32
#endif
-/* IGA1 FIFO Depth_Select */
-static struct vga_regset iga1_fifo_depth_select[] = {
+/* CLE266 and KM400 IGA1 FIFO Depth Select */
+static struct vga_regset iga1_cle266_fifo_depth_select[] = {
+ { VGA_SEQ_I, 0x17, 0, 6 }
+};
+
+/* K8M800 or later IGA1 FIFO Depth Select */
+static struct vga_regset iga1_k8m800_fifo_depth_select[] = {
{ VGA_SEQ_I, 0x17, 0, 7 }
};
@@ -151,8 +156,13 @@ static struct vga_regset iga2_k8m800_fifo_depth_select[] = {
{ VGA_CRT_IC, 0x95, 7, 7 }
};
-/* IGA1 FIFO Threshold Select */
-static struct vga_regset iga1_fifo_threshold_select[] = {
+/* CLE266 and KM400 IGA1 FIFO Threshold Select */
+static struct vga_regset iga1_cle266_fifo_threshold_select[] = {
+ { VGA_SEQ_I, 0x16, 0, 5 }
+};
+
+/* K8M800 or later IGA1 FIFO Threshold Select */
+static struct vga_regset iga1_k8m800_fifo_threshold_select[] = {
{ VGA_SEQ_I, 0x16, 0, 5 },
{ VGA_SEQ_I, 0x16, 7, 7 }
};
@@ -168,8 +178,13 @@ static struct vga_regset iga2_k8m800_fifo_threshold_select[] = {
{ VGA_CRT_IC, 0x95, 4, 6 }
};
-/* IGA1 FIFO High Threshold Select */
-static struct vga_regset iga1_fifo_high_threshold_select[] = {
+/* CLE266 and KM400 IGA1 FIFO High Threshold Select */
+static struct vga_regset iga1_cle266_fifo_high_threshold_select[] = {
+ { VGA_SEQ_I, 0x18, 0, 5 }
+};
+
+/* K8M800 or later IGA1 FIFO High Threshold Select */
+static struct vga_regset iga1_k8m800_fifo_high_threshold_select[] = {
{ VGA_SEQ_I, 0x18, 0, 5 },
{ VGA_SEQ_I, 0x18, 7, 7 }
};
@@ -180,10 +195,14 @@ static struct vga_regset iga2_fifo_high_threshold_select[] = {
{ VGA_CRT_IC, 0x95, 0, 2 }
};
-/* IGA1 FIFO display queue expire */
-static struct vga_regset iga1_display_queue_expire_num[] = {
- { VGA_SEQ_I, 0x22, 0, 4 },
- { VGA_SEQ_I, 0x57, 6, 6 }
+/* CLE266 and KM400 IGA1 FIFO Display Queue Expire */
+static struct vga_regset iga1_cle266_display_queue_expire_num[] = {
+ { VGA_SEQ_I, 0x22, 0, 4 }
+};
+
+/* K8M800 and later IGA1 FIFO Display Queue Expire */
+static struct vga_regset iga1_k8m800_display_queue_expire_num[] = {
+ { VGA_SEQ_I, 0x22, 0, 4 }
};
/* IGA2 FIFO display queue expire */
commit bdc2fe992da7985d4f3828ae59e33b5d63f052ef
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sun Dec 17 00:57:05 2017 -0600
drm/openchrome: Rename via_iga2_interlace_mode
The new name is via_iga2_set_interlace_mode, and it is moved into
crtc_hw.h
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/crtc_hw.h b/drivers/gpu/drm/openchrome/crtc_hw.h
index 1c2b9378d968..91bbf34c7793 100644
--- a/drivers/gpu/drm/openchrome/crtc_hw.h
+++ b/drivers/gpu/drm/openchrome/crtc_hw.h
@@ -128,6 +128,15 @@ via_iga1_set_interlace_mode(void __iomem *regs, bool interlace_mode)
interlace_mode ? "On" : "Off");
}
+static inline void
+via_iga2_set_interlace_mode(void __iomem *regs, bool interlace_mode)
+{
+ svga_wcrt_mask(regs, 0x67,
+ interlace_mode ? BIT(5) : 0x00, BIT(5));
+ DRM_DEBUG_KMS("IGA2 Interlace Mode: %s\n",
+ interlace_mode ? "On" : "Off");
+}
+
/*
* Sets IGA1's HSYNC Shift value.
*/
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index 8f3dc61c230a..ff02f838cb7a 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -147,14 +147,6 @@ via_iga2_set_color_depth(struct via_device *dev_priv,
DRM_DEBUG_KMS("Exiting %s.\n", __func__);
}
-static inline void
-via_iga2_interlace_mode(void __iomem *regs, bool interlaceMode)
-{
- svga_wcrt_mask(regs, 0x67, interlaceMode ? BIT(5) : 0, BIT(5));
- DRM_INFO("IGA2 Interlace Mode: %s\n",
- interlaceMode ? "On" : "Off");
-}
-
static void
via_hide_cursor(struct drm_crtc *crtc)
{
@@ -1839,7 +1831,7 @@ via_iga2_crtc_mode_set(struct drm_crtc *crtc,
via_lock_crtc(VGABASE);
/* Set non-interlace / interlace mode. */
- via_iga2_interlace_mode(VGABASE,
+ via_iga2_set_interlace_mode(VGABASE,
adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE);
/* Load display FIFO parameters. */
commit e1fd3599f1e301736ec6a4a0ad575ef6b08e75cd
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sun Dec 17 00:47:03 2017 -0600
drm/openchrome: Rename via_iga1_interlace_mode
The new name is via_iga1_set_interlace_mode, and it is moved into
crtc_hw.h
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/crtc_hw.h b/drivers/gpu/drm/openchrome/crtc_hw.h
index 15f41adee0f9..1c2b9378d968 100644
--- a/drivers/gpu/drm/openchrome/crtc_hw.h
+++ b/drivers/gpu/drm/openchrome/crtc_hw.h
@@ -119,6 +119,15 @@ via_iga2_set_palette_lut_resolution(void __iomem *regs,
palette_lut ? "8" : "6");
}
+static inline void
+via_iga1_set_interlace_mode(void __iomem *regs, bool interlace_mode)
+{
+ svga_wcrt_mask(regs, 0x33,
+ interlace_mode ? BIT(6) : 0x00, BIT(6));
+ DRM_DEBUG_KMS("IGA1 Interlace Mode: %s\n",
+ interlace_mode ? "On" : "Off");
+}
+
/*
* Sets IGA1's HSYNC Shift value.
*/
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index e2a187147081..8f3dc61c230a 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -107,14 +107,6 @@ via_iga1_set_color_depth(struct via_device *dev_priv,
DRM_DEBUG_KMS("Exiting %s.\n", __func__);
}
-static inline void
-via_iga1_interlace_mode(void __iomem *regs, bool interlaceMode)
-{
- svga_wcrt_mask(regs, 0x33, interlaceMode ? BIT(6) : 0, BIT(6));
- DRM_INFO("IGA1 Interlace Mode: %s\n",
- interlaceMode ? "On" : "Off");
-}
-
static void
via_iga2_set_color_depth(struct via_device *dev_priv,
u8 depth)
@@ -1526,7 +1518,7 @@ via_iga1_crtc_mode_set(struct drm_crtc *crtc,
via_lock_crtc(VGABASE);
/* Set non-interlace / interlace mode. */
- via_iga1_interlace_mode(VGABASE,
+ via_iga1_set_interlace_mode(VGABASE,
adjusted_mode->flags & DRM_MODE_FLAG_INTERLACE);
/* No HSYNC shift. */
commit 8d15a363c39e055f1872286573b9b7dbb7610a36
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sun Dec 17 00:38:04 2017 -0600
drm/openchrome: Move via_iga2_set_palette_lut_resolution into crtc_hw.h
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/crtc_hw.h b/drivers/gpu/drm/openchrome/crtc_hw.h
index 2324fff199ae..15f41adee0f9 100644
--- a/drivers/gpu/drm/openchrome/crtc_hw.h
+++ b/drivers/gpu/drm/openchrome/crtc_hw.h
@@ -106,6 +106,19 @@ via_iga1_set_palette_lut_resolution(void __iomem *regs,
palette_lut ? "8" : "6");
}
+static inline void
+via_iga2_set_palette_lut_resolution(void __iomem *regs,
+ bool palette_lut)
+{
+ /* Set the palette LUT resolution for IGA2. */
+ /* 3X5.6A[5] - IGA2 6 / 8 Bit LUT
+ * 0: 6-bit
+ * 1: 8-bit */
+ svga_wcrt_mask(regs, 0x6a, palette_lut ? BIT(5) : 0x00, BIT(5));
+ DRM_DEBUG_KMS("IGA2 Palette LUT Resolution: %s bit\n",
+ palette_lut ? "8" : "6");
+}
+
/*
* Sets IGA1's HSYNC Shift value.
*/
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index 71dbe02bec27..e2a187147081 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -156,18 +156,6 @@ via_iga2_set_color_depth(struct via_device *dev_priv,
}
static inline void
-via_iga2_set_palette_lut_resolution(void __iomem *regs, bool paletteLUT)
-{
- /* Set the palette LUT resolution for IGA2. */
- /* 3X5.6A[5] - IGA2 6 / 8 Bit LUT
- * 0: 6-bit
- * 1: 8-bit */
- svga_wcrt_mask(regs, 0x6A, paletteLUT ? BIT(5) : 0, BIT(5));
- DRM_INFO("IGA2 Palette LUT Resolution: %s bit\n",
- paletteLUT ? "8" : "6");
-}
-
-static inline void
via_iga2_interlace_mode(void __iomem *regs, bool interlaceMode)
{
svga_wcrt_mask(regs, 0x67, interlaceMode ? BIT(5) : 0, BIT(5));
commit 881ad188d9bff19c115986e000cae785d1360c09
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sat Dec 16 23:54:56 2017 -0600
drm/openchrome: Move via_iga1_set_palette_lut_resolution into crtc_hw.h
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/crtc_hw.h b/drivers/gpu/drm/openchrome/crtc_hw.h
index 3a4d792b6ba5..2324fff199ae 100644
--- a/drivers/gpu/drm/openchrome/crtc_hw.h
+++ b/drivers/gpu/drm/openchrome/crtc_hw.h
@@ -93,6 +93,19 @@ static inline void svga_wcrt_mask(void __iomem *regbase, u8 index, u8 data, u8 m
***********************************************************************/
+static inline void
+via_iga1_set_palette_lut_resolution(void __iomem *regs,
+ bool palette_lut)
+{
+ /* Set the palette LUT resolution for IGA1. */
+ /* 3C5.15[7] - IGA1 6 / 8 Bit LUT
+ * 0: 6-bit
+ * 1: 8-bit */
+ svga_wseq_mask(regs, 0x15, palette_lut ? BIT(7) : 0x00, BIT(7));
+ DRM_DEBUG_KMS("IGA1 Palette LUT Resolution: %s bit\n",
+ palette_lut ? "8" : "6");
+}
+
/*
* Sets IGA1's HSYNC Shift value.
*/
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index 114a589db4d5..71dbe02bec27 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -108,18 +108,6 @@ via_iga1_set_color_depth(struct via_device *dev_priv,
}
static inline void
-via_iga1_set_palette_lut_resolution(void __iomem *regs, bool paletteLUT)
-{
- /* Set the palette LUT resolution for IGA1. */
- /* 3C5.15[7] - IGA1 6 / 8 Bit LUT
- * 0: 6-bit
- * 1: 8-bit */
- svga_wseq_mask(regs, 0x15, paletteLUT ? BIT(7) : 0, BIT(7));
- DRM_INFO("IGA1 Palette LUT Resolution: %s bit\n",
- paletteLUT ? "8" : "6");
-}
-
-static inline void
via_iga1_interlace_mode(void __iomem *regs, bool interlaceMode)
{
svga_wcrt_mask(regs, 0x33, interlaceMode ? BIT(6) : 0, BIT(6));
commit f33e4996573249ce0b3450c0845f66af3e8ba788
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sat Dec 16 17:13:40 2017 -0800
drm/openchrome: Replacing many DRM_DEBUG with DRM_DEBUG_KMS
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index bd0e1cbefe85..114a589db4d5 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -48,7 +48,7 @@ static struct vga_regset vpit_table[] = {
static void
via_iga_common_init(void __iomem *regs)
{
- DRM_DEBUG("Entered via_iga_common_init.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
/* Be careful with 3C5.15[5] - Wrap Around Disable.
* It must be set to 1 for proper operation. */
@@ -60,7 +60,7 @@ via_iga_common_init(void __iomem *regs)
* 1: Enable */
svga_wseq_mask(regs, 0x15, BIT(5) | BIT(1), BIT(5) | BIT(1));
- DRM_DEBUG("Exiting via_iga_common_init.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
}
static void
@@ -69,7 +69,7 @@ via_iga1_set_color_depth(struct via_device *dev_priv,
{
u8 value;
- DRM_DEBUG("Entered via_iga1_set_color_depth.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
value = 0x00;
@@ -104,7 +104,7 @@ via_iga1_set_color_depth(struct via_device *dev_priv,
DRM_ERROR("Unsupported IGA1 Color Depth: %d bit\n", depth);
}
- DRM_DEBUG("Exiting via_iga1_set_color_depth.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
}
static inline void
@@ -133,7 +133,7 @@ via_iga2_set_color_depth(struct via_device *dev_priv,
{
u8 value;
- DRM_DEBUG("Entered via_iga2_set_color_depth.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
value = 0x00;
@@ -164,7 +164,7 @@ via_iga2_set_color_depth(struct via_device *dev_priv,
DRM_ERROR("Unsupported IGA2 Color Depth: %d bit\n", depth);
}
- DRM_DEBUG("Exiting via_iga2_set_color_depth.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
}
static inline void
@@ -1346,7 +1346,7 @@ via_iga1_crtc_dpms(struct drm_crtc *crtc, int mode)
struct via_crtc *iga = container_of(crtc, struct via_crtc, base);
struct via_device *dev_priv = crtc->dev->dev_private;
- DRM_DEBUG("Entered via_iga1_crtc_dpms.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
switch (mode) {
case DRM_MODE_DPMS_SUSPEND:
@@ -1375,7 +1375,7 @@ via_iga1_crtc_dpms(struct drm_crtc *crtc, int mode)
break;
}
- DRM_DEBUG("Exiting via_iga1_crtc_dpms.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
}
static void
@@ -1383,7 +1383,7 @@ via_iga1_crtc_disable(struct drm_crtc *crtc)
{
struct via_crtc *iga = container_of(crtc, struct via_crtc, base);
- DRM_DEBUG("Entered via_iga1_crtc_disable.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
drm_vblank_off(crtc->dev, iga->index);
@@ -1392,13 +1392,13 @@ via_iga1_crtc_disable(struct drm_crtc *crtc)
via_iga1_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
- DRM_DEBUG("Exiting via_iga1_crtc_disable.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
}
static void
via_iga1_crtc_prepare(struct drm_crtc *crtc)
{
- DRM_DEBUG("Entered via_iga1_crtc_prepare.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
/* Turn off the cursor */
via_hide_cursor(crtc);
@@ -1407,13 +1407,13 @@ via_iga1_crtc_prepare(struct drm_crtc *crtc)
if (crtc->enabled)
via_iga1_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
- DRM_DEBUG("Exiting via_iga1_crtc_prepare.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
}
static void
via_iga1_crtc_commit(struct drm_crtc *crtc)
{
- DRM_DEBUG("Entered via_iga1_crtc_commit.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
/* Turn on the cursor */
via_show_cursor(crtc);
@@ -1422,7 +1422,7 @@ via_iga1_crtc_commit(struct drm_crtc *crtc)
if (crtc->enabled)
via_iga1_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
- DRM_DEBUG("Exiting via_iga1_crtc_commit.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
}
static bool
@@ -1430,9 +1430,9 @@ via_iga1_crtc_mode_fixup(struct drm_crtc *crtc,
const struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{
- DRM_DEBUG("Entered via_iga1_crtc_mode_fixup.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
- DRM_DEBUG("Exiting via_iga1_crtc_mode_fixup.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
return true;
}
@@ -1504,7 +1504,7 @@ via_iga1_crtc_mode_set(struct drm_crtc *crtc,
u8 reg_value = 0;
int ret;
- DRM_DEBUG("Entered via_iga1_crtc_mode_set.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
/* Check for IGA2. */
if (iga->index) {
@@ -1580,7 +1580,7 @@ via_iga1_crtc_mode_set(struct drm_crtc *crtc,
ret = via_iga1_crtc_mode_set_base(crtc, x, y, fb);
exit:
- DRM_DEBUG("Exiting via_iga1_crtc_mode_set.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
return ret;
}
@@ -1638,7 +1638,7 @@ via_iga2_crtc_dpms(struct drm_crtc *crtc, int mode)
struct via_crtc *iga = container_of(crtc, struct via_crtc, base);
struct via_device *dev_priv = crtc->dev->dev_private;
- DRM_DEBUG("Entered via_iga2_crtc_dpms.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
switch (mode) {
case DRM_MODE_DPMS_SUSPEND:
@@ -1667,7 +1667,7 @@ via_iga2_crtc_dpms(struct drm_crtc *crtc, int mode)
break;
}
- DRM_DEBUG("Exiting via_iga2_crtc_dpms.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
}
static void
@@ -1675,7 +1675,7 @@ via_iga2_crtc_disable(struct drm_crtc *crtc)
{
struct via_crtc *iga = container_of(crtc, struct via_crtc, base);
- DRM_DEBUG("Entered via_iga2_crtc_disable.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
drm_vblank_off(crtc->dev, iga->index);
@@ -1684,13 +1684,13 @@ via_iga2_crtc_disable(struct drm_crtc *crtc)
via_iga2_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
- DRM_DEBUG("Exiting via_iga2_crtc_disable.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
}
static void
via_iga2_crtc_prepare(struct drm_crtc *crtc)
{
- DRM_DEBUG("Entered via_iga2_crtc_prepare.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
/* Turn off the cursor */
via_hide_cursor(crtc);
@@ -1699,13 +1699,13 @@ via_iga2_crtc_prepare(struct drm_crtc *crtc)
if (crtc->enabled)
via_iga2_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
- DRM_DEBUG("Exiting via_iga2_crtc_prepare.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
}
static void
via_iga2_crtc_commit(struct drm_crtc *crtc)
{
- DRM_DEBUG("Entered via_iga2_crtc_commit.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
/* Turn on the cursor */
via_show_cursor(crtc);
@@ -1714,7 +1714,7 @@ via_iga2_crtc_commit(struct drm_crtc *crtc)
if (crtc->enabled)
via_iga2_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
- DRM_DEBUG("Exiting via_iga2_crtc_commit.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
}
static bool
@@ -1722,9 +1722,9 @@ via_iga2_crtc_mode_fixup(struct drm_crtc *crtc,
const struct drm_display_mode *mode,
struct drm_display_mode *adjusted_mode)
{
- DRM_DEBUG("Entered via_iga2_crtc_mode_fixup.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
- DRM_DEBUG("Exiting via_iga2_crtc_mode_fixup.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
return true;
}
@@ -1795,7 +1795,7 @@ via_iga2_crtc_mode_set(struct drm_crtc *crtc,
struct drm_device *dev = crtc->dev;
int ret;
- DRM_DEBUG("Entered via_iga2_crtc_mode_set.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
/* Check for IGA1. */
if (!iga->index) {
@@ -1898,7 +1898,7 @@ via_iga2_crtc_mode_set(struct drm_crtc *crtc,
ret = via_iga2_crtc_mode_set_base(crtc, x, y, fb);
exit:
- DRM_DEBUG("Exiting via_iga2_crtc_mode_set.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
return ret;
}
diff --git a/drivers/gpu/drm/openchrome/via_drv.c b/drivers/gpu/drm/openchrome/via_drv.c
index 92109b805380..580e95e6783d 100644
--- a/drivers/gpu/drm/openchrome/via_drv.c
+++ b/drivers/gpu/drm/openchrome/via_drv.c
@@ -322,7 +322,7 @@ via_device_init(struct via_device *dev_priv)
{
int ret;
- DRM_DEBUG("Entered via_device_init.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
/* Temporary implementation. */
dev_priv->is_via_nanobook = false;
@@ -337,7 +337,7 @@ via_device_init(struct via_device *dev_priv)
via_mmio_setup(dev_priv);
exit:
- DRM_DEBUG("Exiting via_device_init.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
return ret;
}
@@ -514,7 +514,7 @@ static int via_final_context(struct drm_device *dev, int context)
/* Linux specific until context tracking code gets ported to BSD */
/* Last context, perform cleanup */
if (dev->dev_private) {
- DRM_DEBUG("Last Context\n");
+ DRM_DEBUG_KMS("Last Context\n");
drm_irq_uninstall(dev);
via_dma_cleanup(dev);
}
diff --git a/drivers/gpu/drm/openchrome/via_fb.c b/drivers/gpu/drm/openchrome/via_fb.c
index c0b8374f3e8b..ff34f3530b7c 100644
--- a/drivers/gpu/drm/openchrome/via_fb.c
+++ b/drivers/gpu/drm/openchrome/via_fb.c
@@ -697,7 +697,7 @@ int via_vram_init(struct via_device *dev_priv)
u8 size;
int ret = 0;
- DRM_DEBUG("Entered via_vram_init.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
bus = pci_find_bus(0, 0);
if (bus == NULL) {
@@ -906,7 +906,7 @@ out_err:
if (fn3)
pci_dev_put(fn3);
- DRM_DEBUG("Exiting via_vram_init.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
return ret;
}
diff --git a/drivers/gpu/drm/openchrome/via_ttm.c b/drivers/gpu/drm/openchrome/via_ttm.c
index c3c6edca2495..5f498a85b54c 100644
--- a/drivers/gpu/drm/openchrome/via_ttm.c
+++ b/drivers/gpu/drm/openchrome/via_ttm.c
@@ -84,7 +84,7 @@ via_ttm_global_release(struct drm_global_reference *global_ref,
struct ttm_bo_global_ref *global_bo,
struct ttm_bo_device *bdev)
{
- DRM_DEBUG("Entered via_ttm_global_release.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
if (global_ref->release == NULL)
return;
@@ -93,7 +93,7 @@ via_ttm_global_release(struct drm_global_reference *global_ref,
drm_global_item_unref(global_ref);
global_ref->release = NULL;
- DRM_DEBUG("Exiting via_ttm_global_release.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
}
static void
@@ -457,7 +457,7 @@ via_bo_move(struct ttm_buffer_object *bo, bool evict, bool interruptible,
struct ttm_mem_reg *old_mem = &bo->mem;
int ret = 0;
- DRM_DEBUG("Entered via_bo_move.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
if ((old_mem->mem_type == TTM_PL_SYSTEM) && (!bo->ttm)) {
BUG_ON(old_mem->mm_node != NULL);
@@ -495,7 +495,7 @@ via_bo_move(struct ttm_buffer_object *bo, bool evict, bool interruptible,
}
exit:
- DRM_DEBUG("Exiting via_bo_move.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
return ret;
}
@@ -579,7 +579,7 @@ int via_mm_init(struct via_device *dev_priv)
int len;
int ret;
- DRM_DEBUG("Entered via_mm_init.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
ret = via_ttm_global_init(dev_priv);
if (ret) {
@@ -637,15 +637,15 @@ int via_mm_init(struct via_device *dev_priv)
DRM_INFO("Mapped MMIO at physical address 0x%08llx.\n",
start);
exit:
- DRM_DEBUG("Exiting via_mm_init.\n");
- return ret;
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
+ return ret;
}
void via_mm_fini(struct drm_device *dev)
{
struct via_device *dev_priv = dev->dev_private;
- DRM_DEBUG("Entered via_mm_fini.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
ttm_bo_device_release(&dev_priv->ttm.bdev);
@@ -660,7 +660,7 @@ void via_mm_fini(struct drm_device *dev)
dev_priv->vram_mtrr = 0;
- DRM_DEBUG("Exiting via_mm_fini.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
}
/*
@@ -710,7 +710,7 @@ int via_bo_create(struct ttm_bo_device *bdev,
size_t acc_size;
int ret = -ENOMEM;
- DRM_DEBUG("Entered via_bo_create.\n");
+ DRM_DEBUG_KMS("Entered %s.\n", __func__);
size = round_up(size, byte_alignment);
size = ALIGN(size, page_alignment);
@@ -743,7 +743,7 @@ int via_bo_create(struct ttm_bo_device *bdev,
error:
kfree(heap);
exit:
- DRM_DEBUG("Exiting via_bo_create.\n");
+ DRM_DEBUG_KMS("Exiting %s.\n", __func__);
return ret;
}
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