[Openchrome-devel] drm-openchrome: Branch 'drm-next-3.19' - 3 commits - drivers/gpu/drm

Kevin Brace kevinbrace at kemper.freedesktop.org
Tue Dec 19 05:00:44 UTC 2017


 drivers/gpu/drm/openchrome/via_crtc.c |  154 ----------------------------------
 drivers/gpu/drm/openchrome/via_drv.h  |    2 
 2 files changed, 4 insertions(+), 152 deletions(-)

New commits:
commit d9fa34371c5235698867ec1a9d9d0531b05e2f28
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Mon Dec 18 22:56:26 2017 -0600

    drm/openchrome: Version bumped to 3.0.63
    
    A fix for CLE266 chipset regression and reduction of duplicated code.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/openchrome/via_drv.h b/drivers/gpu/drm/openchrome/via_drv.h
index e035c6b49b5c..1933c446f0b9 100644
--- a/drivers/gpu/drm/openchrome/via_drv.h
+++ b/drivers/gpu/drm/openchrome/via_drv.h
@@ -34,7 +34,7 @@
 
 #define DRIVER_MAJOR		3
 #define DRIVER_MINOR		0
-#define DRIVER_PATCHLEVEL	62
+#define DRIVER_PATCHLEVEL	63
 
 #include <linux/module.h>
 
commit c057f638413a16de928fce473109ad761f09a987
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Mon Dec 18 22:40:03 2017 -0600

    drm/openchrome: Set display FIFO parameters only when mode setting
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index cae8779c3649..33e55af082b8 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -2195,86 +2195,6 @@ via_crtc_init(struct drm_device *dev, int index)
         /* Older hardware only uses 12 bits */
         iga->offset.count = ARRAY_SIZE(iga2_offset) - 1;
         iga->offset.regs = iga2_offset;
-
-        switch (dev->pdev->device) {
-        case PCI_DEVICE_ID_VIA_K8M800:
-            iga->display_queue_expire_num = 0;
-            iga->fifo_high_threshold = 296;
-            iga->fifo_threshold = 328;
-            iga->fifo_max_depth = 384;
-            break;
-
-        case PCI_DEVICE_ID_VIA_PM800:
-            iga->display_queue_expire_num = 0;
-            iga->fifo_high_threshold = 64;
-            iga->fifo_threshold = 128;
-            iga->fifo_max_depth = 192;
-            break;
-
-        case PCI_DEVICE_ID_VIA_CN700:
-            iga->display_queue_expire_num = 128;
-            iga->fifo_high_threshold = 32;
-            iga->fifo_threshold = 80;
-            iga->fifo_max_depth = 96;
-            break;
-
-            /* CX700 */
-        case PCI_DEVICE_ID_VIA_VT3157:
-            iga->display_queue_expire_num = 128;
-            iga->fifo_high_threshold = 32;
-            iga->fifo_threshold = 64;
-            iga->fifo_max_depth = 96;
-            break;
-
-            /* K8M890 */
-        case PCI_DEVICE_ID_VIA_K8M890:
-            iga->display_queue_expire_num = 124;
-            iga->fifo_high_threshold = 296;
-            iga->fifo_threshold = 328;
-            iga->fifo_max_depth = 360;
-            break;
-
-            /* P4M890 */
-        case PCI_DEVICE_ID_VIA_VT3343:
-            iga->display_queue_expire_num = 32;
-            iga->fifo_high_threshold = 64;
-            iga->fifo_threshold = 76;
-            iga->fifo_max_depth = 96;
-            break;
-
-            /* P4M900 */
-        case PCI_DEVICE_ID_VIA_P4M900:
-            iga->fifo_high_threshold = iga->fifo_threshold = 76;
-            iga->display_queue_expire_num = 32;
-            iga->fifo_max_depth = 96;
-            break;
-
-            /* VX800 */
-        case PCI_DEVICE_ID_VIA_VT1122:
-            iga->display_queue_expire_num = 128;
-            iga->fifo_high_threshold = 32;
-            iga->fifo_threshold = 64;
-            iga->fifo_max_depth = 96;
-            iga->offset.count++;
-            break;
-
-            /* VX855 */
-        case PCI_DEVICE_ID_VIA_VX875:
-            iga->fifo_high_threshold = iga->fifo_threshold = 160;
-            iga->display_queue_expire_num = 320;
-            iga->fifo_max_depth = 200;
-            iga->offset.count++;
-            break;
-
-            /* VX900 */
-        case PCI_DEVICE_ID_VIA_VX900_VGA:
-            iga->fifo_high_threshold = iga->fifo_threshold = 160;
-            iga->display_queue_expire_num = 320;
-            iga->fifo_max_depth = 192;
-            iga->offset.count++;
-        default:
-            break;
-        }
     } else {
         drm_crtc_init(dev, crtc, &via_iga1_funcs);
         drm_crtc_helper_add(crtc, &via_iga1_helper_funcs);
@@ -2352,77 +2272,8 @@ via_crtc_init(struct drm_device *dev, int index)
 
         iga->offset.count = ARRAY_SIZE(iga1_offset);
         iga->offset.regs = iga1_offset;
-
-        switch (dev->pdev->device) {
-        case PCI_DEVICE_ID_VIA_K8M800:
-            iga->display_queue_expire_num = 128;
-            iga->fifo_high_threshold = 296;
-            iga->fifo_threshold = 328;
-            iga->fifo_max_depth = 384;
-            break;
-
-        case PCI_DEVICE_ID_VIA_PM800:
-            iga->display_queue_expire_num = 128;
-            iga->fifo_high_threshold = 32;
-            iga->fifo_threshold = 64;
-            iga->fifo_max_depth = 96;
-            break;
-
-        case PCI_DEVICE_ID_VIA_CN700:
-            iga->display_queue_expire_num = 0;
-            iga->fifo_high_threshold = 64;
-            iga->fifo_threshold = 80;
-            iga->fifo_max_depth = 96;
-            break;
-
-            /* CX700 */
-        case PCI_DEVICE_ID_VIA_VT3157:
-            iga->fifo_high_threshold = iga->fifo_threshold = 128;
-            iga->display_queue_expire_num = 124;
-            iga->fifo_max_depth = 192;
-            break;
-
-            /* K8M890 */
-        case PCI_DEVICE_ID_VIA_K8M890:
-            iga->display_queue_expire_num = 124;
-            iga->fifo_high_threshold = 296;
-            iga->fifo_threshold = 328;
-            iga->fifo_max_depth = 360;
-            break;
-
-            /* P4M890 */
-        case PCI_DEVICE_ID_VIA_VT3343:
-            iga->display_queue_expire_num = 32;
-            iga->fifo_high_threshold = 64;
-            iga->fifo_threshold = 76;
-            iga->fifo_max_depth = 96;
-            break;
-
-            /* P4M900 */
-        case PCI_DEVICE_ID_VIA_P4M900:
-            iga->fifo_high_threshold = iga->fifo_threshold = 76;
-            iga->display_queue_expire_num = 32;
-            iga->fifo_max_depth = 96;
-            break;
-
-            /* VX800 */
-        case PCI_DEVICE_ID_VIA_VT1122:
-            iga->fifo_high_threshold = iga->fifo_threshold = 152;
-            iga->display_queue_expire_num = 64;
-            iga->fifo_max_depth = 192;
-            break;
-
-            /* VX855 */
-        case PCI_DEVICE_ID_VIA_VX875:
-            /* VX900 */
-        case PCI_DEVICE_ID_VIA_VX900_VGA:
-            iga->fifo_high_threshold = iga->fifo_threshold = 320;
-            iga->display_queue_expire_num = 160;
-            iga->fifo_max_depth = 400;
-        default:
-            break;
-        }
     }
+
     drm_mode_crtc_set_gamma_size(crtc, 256);
     gamma = crtc->gamma_store;
 
commit a55d7cf0d0b5d2af310f3e3b7af4b41a4bf2980b
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Mon Dec 18 22:29:20 2017 -0600

    drm/openchrome: Missing CLE266 IGA2 display FIFO initialization
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index 31cb9ef9ab71..cae8779c3649 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -2168,7 +2168,8 @@ via_crtc_init(struct drm_device *dev, int index)
         iga->timings.vsync_end.regs = iga2_ver_sync_end;
 
         /* Secondary FIFO setup */
-        if (dev->pdev->device == PCI_DEVICE_ID_VIA_KM400) {
+        if ((dev->pdev->device == PCI_DEVICE_ID_VIA_CLE266) ||
+            (dev->pdev->device == PCI_DEVICE_ID_VIA_KM400)) {
             iga->fifo_depth.count = ARRAY_SIZE(iga2_cle266_fifo_depth_select);
             iga->fifo_depth.regs = iga2_cle266_fifo_depth_select;
 


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