[Openchrome-devel] drm-openchrome: Branch 'drm-next-3.19' - 3 commits - drivers/gpu/drm

[Kevin Brace]

 drivers/gpu/drm/openchrome/via_crtc.c |   50 +++++++++++++++++++++++-----------
 drivers/gpu/drm/openchrome/via_drv.h  |    2 -
 2 files changed, 35 insertions(+), 17 deletions(-)

New commits:
commit 712f97325b8347691fbb3e197943b192fa181d31
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Tue Dec 19 19:09:08 2017 -0600

    drm/openchrome: Version bumped to 3.0.65
    
    Display FIFO fixes for K8M800 chipset.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/openchrome/via_drv.h b/drivers/gpu/drm/openchrome/via_drv.h
index e037e347f8c2..8133c97dc28a 100644
--- a/drivers/gpu/drm/openchrome/via_drv.h
+++ b/drivers/gpu/drm/openchrome/via_drv.h
@@ -34,7 +34,7 @@
 
 #define DRIVER_MAJOR		3
 #define DRIVER_MINOR		0
-#define DRIVER_PATCHLEVEL	64
+#define DRIVER_PATCHLEVEL	65
 
 #include <linux/module.h>
 
commit 7d898bd7dba3a4c9c2a72a73ecd3c2c6a69f1c93
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Tue Dec 19 19:06:33 2017 -0600

    drm/openchrome: Changing K8M800 IGA2 display FIFO parameters
    
    The display FIFO parameters came from VIA Technologies Chrome IGP open
    source DDX device driver.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index 847e6f59df4a..1572dc343302 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -894,12 +894,23 @@ static void via_iga2_display_fifo_regs(struct drm_device *dev,
 
         break;
     case PCI_DEVICE_ID_VIA_K8M800:
-        iga->display_queue_expire_num = 0;
-        iga->fifo_high_threshold = 296;
+        /* SR17[7:0] */
+        iga->fifo_max_depth = 376;
+
+        /* SR16[7], SR16[5:0] */
         iga->fifo_threshold = 328;
-        iga->fifo_max_depth = 384;
-        break;
 
+        /* SR18[7], SR18[5:0] */
+        iga->fifo_high_threshold = 296;
+
+        if ((fb->bits_per_pixel == 32) &&
+            (mode->hdisplay >= 1400)) {
+            iga->display_queue_expire_num = 64;
+        } else {
+            iga->display_queue_expire_num = 128;
+        }
+
+        break;
     case PCI_DEVICE_ID_VIA_PM800:
         iga->display_queue_expire_num = 0;
         iga->fifo_high_threshold = 64;
@@ -995,15 +1006,12 @@ static void via_iga2_display_fifo_regs(struct drm_device *dev,
     } else {
         /* If resolution > 1280x1024, expire length = 64, else
          expire length = 128 */
-        if ((dev->pdev->device == PCI_DEVICE_ID_VIA_K8M800
-                || dev->pdev->device == PCI_DEVICE_ID_VIA_CN700)
-                && ((mode->hdisplay > 1280) && (mode->vdisplay > 1024)))
+        if ((dev->pdev->device == PCI_DEVICE_ID_VIA_CN700) &&
+            (mode->hdisplay > 1280) && (mode->vdisplay > 1024))
             iga->display_queue_expire_num = 16;
 
         /* Set IGA2 Display FIFO Depth Select */
         reg_value = IGA2_FIFO_DEPTH_SELECT_FORMULA(iga->fifo_max_depth);
-        if (dev->pdev->device == PCI_DEVICE_ID_VIA_K8M800)
-            reg_value--;
         load_value_to_registers(VGABASE, &iga->fifo_depth, reg_value);
 
         /* Set Display FIFO Threshold Select */
commit 423e021f81a856e0624f8a2090b1a031eaa04a66
Author: Kevin Brace <kevinbrace at gmx.com>
Date:   Tue Dec 19 18:58:29 2017 -0600

    drm/openchrome: Changing K8M800 IGA1 display FIFO parameters
    
    The display FIFO parameters came from VIA Technologies Chrome IGP open
    source DDX device driver.
    
    Signed-off-by: Kevin Brace <kevinbrace at gmx.com>

diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index 57d2fac2f6f0..847e6f59df4a 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -656,12 +656,23 @@ static void via_iga1_display_fifo_regs(struct drm_device *dev,
 
         break;
     case PCI_DEVICE_ID_VIA_K8M800:
-        iga->display_queue_expire_num = 128;
-        iga->fifo_high_threshold = 296;
+        /* SR17[7:0] */
+        iga->fifo_max_depth = 768;
+
+        /* SR16[7], SR16[5:0] */
         iga->fifo_threshold = 328;
-        iga->fifo_max_depth = 384;
-        break;
 
+        /* SR18[7], SR18[5:0] */
+        iga->fifo_high_threshold = 296;
+
+        if ((fb->bits_per_pixel == 32) &&
+            (mode->hdisplay >= 1400)) {
+            iga->display_queue_expire_num = 64;
+        } else {
+            iga->display_queue_expire_num = 128;
+        }
+
+        break;
     case PCI_DEVICE_ID_VIA_PM800:
         iga->display_queue_expire_num = 128;
         iga->fifo_high_threshold = 32;
@@ -755,9 +766,8 @@ static void via_iga1_display_fifo_regs(struct drm_device *dev,
 
     /* If resolution > 1280x1024, expire length = 64, else
      expire length = 128 */
-    if ((dev->pdev->device == PCI_DEVICE_ID_VIA_K8M800
-            || dev->pdev->device == PCI_DEVICE_ID_VIA_CN700)
-            && ((mode->hdisplay > 1280) && (mode->vdisplay > 1024)))
+    if ((dev->pdev->device == PCI_DEVICE_ID_VIA_CN700) &&
+        ((mode->hdisplay > 1280) && (mode->vdisplay > 1024)))
         iga->display_queue_expire_num = 16;
 
     /* Set IGA1 Display FIFO Depth Select */