[Openchrome-devel] drm-openchrome: Branch 'drm-next-4.15' - 8 commits - drivers/gpu/drm
Kevin Brace
kevinbrace at kemper.freedesktop.org
Sun Jan 28 23:15:18 UTC 2018
drivers/gpu/drm/openchrome/via_crtc.c | 120 ++++++++++++++++++++----------
drivers/gpu/drm/openchrome/via_disp_reg.h | 2
drivers/gpu/drm/openchrome/via_drv.h | 2
3 files changed, 82 insertions(+), 42 deletions(-)
New commits:
commit 8186a66d3652200da90c91cf30d7afa8e4d4cd62
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sun Jan 28 15:14:54 2018 -0800
drm/openchrome: Version bumped to 3.0.68
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_drv.h b/drivers/gpu/drm/openchrome/via_drv.h
index 5663ef15adea..08b6104c921f 100644
--- a/drivers/gpu/drm/openchrome/via_drv.h
+++ b/drivers/gpu/drm/openchrome/via_drv.h
@@ -34,7 +34,7 @@
#define DRIVER_MAJOR 3
#define DRIVER_MINOR 0
-#define DRIVER_PATCHLEVEL 67
+#define DRIVER_PATCHLEVEL 68
#include <linux/module.h>
commit d84afd919d66fe354b39dcc1c595770ef458e05f
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sun Jan 28 15:12:24 2018 -0800
drm/openchrome: Reorganize P4M900 IGA1 and IGA2 display FIFO parameters
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index d0e4ca0dc74a..66ea4f122dfd 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -753,12 +753,19 @@ static void via_iga1_display_fifo_regs(struct drm_device *dev,
/* SR22[4:0] */
iga->display_queue_expire_num = P4M890_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
break;
-
- /* P4M900 */
+ /* P4M900 */
case PCI_DEVICE_ID_VIA_P4M900:
- iga->fifo_high_threshold = iga->fifo_threshold = 76;
- iga->display_queue_expire_num = 32;
- iga->fifo_max_depth = 96;
+ /* SR17[7:0] */
+ iga->fifo_max_depth = P4M900_IGA1_FIFO_MAX_DEPTH;
+
+ /* SR16[7], SR16[5:0] */
+ iga->fifo_threshold = P4M900_IGA1_FIFO_THRESHOLD;
+
+ /* SR18[7], SR18[5:0] */
+ iga->fifo_high_threshold = P4M900_IGA1_FIFO_HIGH_THRESHOLD;
+
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = P4M900_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
break;
/* VX800 */
@@ -1028,12 +1035,19 @@ static void via_iga2_display_fifo_regs(struct drm_device *dev,
/* CR94[6:0] */
iga->display_queue_expire_num = P4M890_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
break;
-
- /* P4M900 */
+ /* P4M900 */
case PCI_DEVICE_ID_VIA_P4M900:
- iga->fifo_high_threshold = iga->fifo_threshold = 76;
- iga->display_queue_expire_num = 32;
- iga->fifo_max_depth = 96;
+ /* CR95[7], CR94[7], CR68[7:4] */
+ iga->fifo_max_depth = P4M900_IGA2_FIFO_MAX_DEPTH;
+
+ /* CR95[7], CR94[7], CR68[7:4] */
+ iga->fifo_threshold = P4M900_IGA2_FIFO_THRESHOLD;
+
+ /* CR95[2:0], CR92[3:0] */
+ iga->fifo_high_threshold = P4M900_IGA2_FIFO_HIGH_THRESHOLD;
+
+ /* CR94[6:0] */
+ iga->display_queue_expire_num = P4M900_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
break;
/* VX800 */
commit 8a3ccf96f2692e218646dbdd4512b70e37ce1947
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sun Jan 28 15:11:00 2018 -0800
drm/openchrome: Reorganize P4M800 Pro IGA1 and IGA2 display FIFO parameters
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index d57d62a8948a..d0e4ca0dc74a 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -707,16 +707,16 @@ static void via_iga1_display_fifo_regs(struct drm_device *dev,
break;
case PCI_DEVICE_ID_VIA_CN700:
/* SR17[7:0] */
- iga->fifo_max_depth = 96;
+ iga->fifo_max_depth = CN700_IGA1_FIFO_MAX_DEPTH;
/* SR16[7], SR16[5:0] */
- iga->fifo_threshold = 80;
+ iga->fifo_threshold = CN700_IGA1_FIFO_THRESHOLD;
/* SR18[7], SR18[5:0] */
- iga->fifo_high_threshold = 64;
+ iga->fifo_high_threshold = CN700_IGA1_FIFO_HIGH_THRESHOLD;
/* SR22[4:0] */
- iga->display_queue_expire_num = 128;
+ iga->display_queue_expire_num = CN700_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
break;
/* CX700 */
case PCI_DEVICE_ID_VIA_VT3157:
@@ -981,16 +981,16 @@ static void via_iga2_display_fifo_regs(struct drm_device *dev,
break;
case PCI_DEVICE_ID_VIA_CN700:
/* CR95[7], CR94[7], CR68[7:4] */
- iga->fifo_max_depth = 96;
+ iga->fifo_max_depth = CN700_IGA2_FIFO_MAX_DEPTH;
/* CR95[6:4], CR68[3:0] */
- iga->fifo_threshold = 80;
+ iga->fifo_threshold = CN700_IGA2_FIFO_THRESHOLD;
/* CR95[2:0], CR92[3:0] */
- iga->fifo_high_threshold = 32;
+ iga->fifo_high_threshold = CN700_IGA2_FIFO_HIGH_THRESHOLD;
/* CR94[6:0] */
- iga->display_queue_expire_num = 128;
+ iga->display_queue_expire_num = CN700_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
break;
/* CX700 */
case PCI_DEVICE_ID_VIA_VT3157:
commit 6718bb43262d97f97f2e3520925fc6f29ee91fa4
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sun Jan 28 15:08:28 2018 -0800
drm/openchrome: Adjusting P4M800 Pro IGA1 Display Queue Expire Number
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_disp_reg.h b/drivers/gpu/drm/openchrome/via_disp_reg.h
index a8a27e2fb8ec..a3b2cf8ddcbe 100644
--- a/drivers/gpu/drm/openchrome/via_disp_reg.h
+++ b/drivers/gpu/drm/openchrome/via_disp_reg.h
@@ -36,7 +36,7 @@
#define CN700_IGA1_FIFO_MAX_DEPTH 96 /* location: {SR17,0,7}*/
#define CN700_IGA1_FIFO_THRESHOLD 80 /* location: {SR16,0,5},{SR16,7,7}*/
#define CN700_IGA1_FIFO_HIGH_THRESHOLD 64 /* location: {SR18,0,5},{SR18,7,7}*/
-#define CN700_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 0 /* location: {SR22,0,4}. (128/4) =64,
+#define CN700_IGA1_DISPLAY_QUEUE_EXPIRE_NUM 128 /* location: {SR22,0,4}. (128/4) =64,
* P800 must be set zero, because HW
* only 5 bits */
#define CN700_IGA2_FIFO_MAX_DEPTH 96 /* location: {CR68,4,7},{CR94,7,7},{CR95,7,7}*/
commit 0e31fcf655c8be53f58d56d84d20348801c85ffd
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sun Jan 28 15:05:13 2018 -0800
drm/openchrome: Reorganize K8M890 IGA1 and IGA2 display FIFO parameters
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index 28f4bd3d277f..d57d62a8948a 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -728,16 +728,16 @@ static void via_iga1_display_fifo_regs(struct drm_device *dev,
/* K8M890 */
case PCI_DEVICE_ID_VIA_K8M890:
/* SR17[7:0] */
- iga->fifo_max_depth = 360;
+ iga->fifo_max_depth = K8M890_IGA1_FIFO_MAX_DEPTH;
/* SR16[7], SR16[5:0] */
- iga->fifo_threshold = 328;
+ iga->fifo_threshold = K8M890_IGA1_FIFO_THRESHOLD;
/* SR18[7], SR18[5:0] */
- iga->fifo_high_threshold = 296;
+ iga->fifo_high_threshold = K8M890_IGA1_FIFO_HIGH_THRESHOLD;
/* SR22[4:0] */
- iga->display_queue_expire_num = 124;
+ iga->display_queue_expire_num = K8M890_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
break;
/* P4M890 */
case PCI_DEVICE_ID_VIA_VT3343:
@@ -1003,16 +1003,16 @@ static void via_iga2_display_fifo_regs(struct drm_device *dev,
/* K8M890 */
case PCI_DEVICE_ID_VIA_K8M890:
/* CR95[7], CR94[7], CR68[7:4] */
- iga->fifo_max_depth = 360;
+ iga->fifo_max_depth = K8M890_IGA2_FIFO_MAX_DEPTH;
/* CR95[6:4], CR68[3:0] */
- iga->fifo_threshold = 328;
+ iga->fifo_threshold = K8M890_IGA2_FIFO_THRESHOLD;
/* CR95[2:0], CR92[3:0] */
- iga->fifo_high_threshold = 296;
+ iga->fifo_high_threshold = K8M890_IGA2_FIFO_HIGH_THRESHOLD;
/* CR94[6:0] */
- iga->display_queue_expire_num = 124;
+ iga->display_queue_expire_num = K8M890_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
break;
/* P4M890 */
case PCI_DEVICE_ID_VIA_VT3343:
commit ac209fcb3f822780fad5a228c777d0034c566d92
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sun Jan 28 15:02:31 2018 -0800
drm/openchrome: Reorganize P4M890 IGA1 and IGA2 display FIFO parameters
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index 6d35e04da11e..28f4bd3d277f 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -739,13 +739,19 @@ static void via_iga1_display_fifo_regs(struct drm_device *dev,
/* SR22[4:0] */
iga->display_queue_expire_num = 124;
break;
-
- /* P4M890 */
+ /* P4M890 */
case PCI_DEVICE_ID_VIA_VT3343:
- iga->display_queue_expire_num = 32;
- iga->fifo_high_threshold = 64;
- iga->fifo_threshold = 76;
- iga->fifo_max_depth = 96;
+ /* SR17[7:0] */
+ iga->fifo_max_depth = P4M890_IGA1_FIFO_MAX_DEPTH;
+
+ /* SR16[7], SR16[5:0] */
+ iga->fifo_threshold = P4M890_IGA1_FIFO_THRESHOLD;
+
+ /* SR18[7], SR18[5:0] */
+ iga->fifo_high_threshold = P4M890_IGA1_FIFO_HIGH_THRESHOLD;
+
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = P4M890_IGA1_DISPLAY_QUEUE_EXPIRE_NUM;
break;
/* P4M900 */
@@ -1008,12 +1014,19 @@ static void via_iga2_display_fifo_regs(struct drm_device *dev,
/* CR94[6:0] */
iga->display_queue_expire_num = 124;
break;
- /* P4M890 */
+ /* P4M890 */
case PCI_DEVICE_ID_VIA_VT3343:
- iga->display_queue_expire_num = 32;
- iga->fifo_high_threshold = 64;
- iga->fifo_threshold = 76;
- iga->fifo_max_depth = 96;
+ /* CR95[7], CR94[7], CR68[7:4] */
+ iga->fifo_max_depth = P4M890_IGA2_FIFO_MAX_DEPTH;
+
+ /* CR95[6:4], CR68[3:0] */
+ iga->fifo_threshold = P4M890_IGA2_FIFO_THRESHOLD;
+
+ /* CR95[2:0], CR92[3:0] */
+ iga->fifo_high_threshold = P4M890_IGA2_FIFO_HIGH_THRESHOLD;
+
+ /* CR94[6:0] */
+ iga->display_queue_expire_num = P4M890_IGA2_DISPLAY_QUEUE_EXPIRE_NUM;
break;
/* P4M900 */
commit 3143c01541baad7144449b15bf94bff77ebe81e7
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sun Jan 28 14:55:58 2018 -0800
drm/openchrome: Cleaned up K8M890 IGA1 and IGA2 display FIFO parameters
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index bb2ec20c9355..6d35e04da11e 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -725,12 +725,19 @@ static void via_iga1_display_fifo_regs(struct drm_device *dev,
iga->fifo_max_depth = 192;
break;
- /* K8M890 */
+ /* K8M890 */
case PCI_DEVICE_ID_VIA_K8M890:
- iga->display_queue_expire_num = 124;
- iga->fifo_high_threshold = 296;
- iga->fifo_threshold = 328;
+ /* SR17[7:0] */
iga->fifo_max_depth = 360;
+
+ /* SR16[7], SR16[5:0] */
+ iga->fifo_threshold = 328;
+
+ /* SR18[7], SR18[5:0] */
+ iga->fifo_high_threshold = 296;
+
+ /* SR22[4:0] */
+ iga->display_queue_expire_num = 124;
break;
/* P4M890 */
@@ -987,14 +994,20 @@ static void via_iga2_display_fifo_regs(struct drm_device *dev,
iga->fifo_max_depth = 96;
break;
- /* K8M890 */
+ /* K8M890 */
case PCI_DEVICE_ID_VIA_K8M890:
- iga->display_queue_expire_num = 124;
- iga->fifo_high_threshold = 296;
- iga->fifo_threshold = 328;
+ /* CR95[7], CR94[7], CR68[7:4] */
iga->fifo_max_depth = 360;
- break;
+ /* CR95[6:4], CR68[3:0] */
+ iga->fifo_threshold = 328;
+
+ /* CR95[2:0], CR92[3:0] */
+ iga->fifo_high_threshold = 296;
+
+ /* CR94[6:0] */
+ iga->display_queue_expire_num = 124;
+ break;
/* P4M890 */
case PCI_DEVICE_ID_VIA_VT3343:
iga->display_queue_expire_num = 32;
commit 91eaf4500ad683053cbb3b7530f9f4f8a5a4bbb1
Author: Kevin Brace <kevinbrace at gmx.com>
Date: Sun Jan 28 14:50:39 2018 -0800
drm/openchrome: Changing P4M800 Pro IGA1 and IGA2 display FIFO parameters
The display FIFO parameters came from a newer VIA Technologies Chrome IGP
open source DDX device driver.
Signed-off-by: Kevin Brace <kevinbrace at gmx.com>
diff --git a/drivers/gpu/drm/openchrome/via_crtc.c b/drivers/gpu/drm/openchrome/via_crtc.c
index 5f94a4599f92..bb2ec20c9355 100644
--- a/drivers/gpu/drm/openchrome/via_crtc.c
+++ b/drivers/gpu/drm/openchrome/via_crtc.c
@@ -707,16 +707,16 @@ static void via_iga1_display_fifo_regs(struct drm_device *dev,
break;
case PCI_DEVICE_ID_VIA_CN700:
/* SR17[7:0] */
- iga->fifo_max_depth = 128;
+ iga->fifo_max_depth = 96;
/* SR16[7], SR16[5:0] */
- iga->fifo_threshold = 32;
+ iga->fifo_threshold = 80;
/* SR18[7], SR18[5:0] */
- iga->fifo_high_threshold = 56;
+ iga->fifo_high_threshold = 64;
/* SR22[4:0] */
- iga->display_queue_expire_num = 124;
+ iga->display_queue_expire_num = 128;
break;
/* CX700 */
case PCI_DEVICE_ID_VIA_VT3157:
@@ -968,16 +968,16 @@ static void via_iga2_display_fifo_regs(struct drm_device *dev,
break;
case PCI_DEVICE_ID_VIA_CN700:
/* CR95[7], CR94[7], CR68[7:4] */
- iga->fifo_max_depth = 128;
+ iga->fifo_max_depth = 96;
/* CR95[6:4], CR68[3:0] */
- iga->fifo_threshold = 32;
+ iga->fifo_threshold = 80;
/* CR95[2:0], CR92[3:0] */
- iga->fifo_high_threshold = 56;
+ iga->fifo_high_threshold = 32;
/* CR94[6:0] */
- iga->display_queue_expire_num = 124;
+ iga->display_queue_expire_num = 128;
break;
/* CX700 */
case PCI_DEVICE_ID_VIA_VT3157:
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