[Pixman] Basic infrastructure for MIPS architecture and initial set of SRC routines.
nlukic at mips.com
Tue Feb 21 06:59:34 PST 2012
Per previous code review:
Run time detection is still there (per Siarhei's comments), uses /proc/cpuinfo,
but now properly detects DSPr2 extensions and 32 byte cache line size (both are
true only for MIPS 74Kc cores).
- Currently only 74Kc core is available that supports DSPr2.
- In the future, when M14KE, 1074Kc cores (and others) become available we
can add those also to the search string.
-mdspr2 compiler flag is automatically enabled for MIPS platforms. It can be
disabled at configure time for chips that doesn't support it.
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