[Pixman] [PATCH 00/10] Cleanups to CPU detection

Matt Turner mattst88 at gmail.com
Fri Jun 29 14:24:06 PDT 2012

On Fri, Jun 29, 2012 at 5:20 PM, Alan Coopersmith
<alan.coopersmith at oracle.com> wrote:
> On 06/29/12 01:44 PM, Søren Sandmann Pedersen wrote:
>> I was looking at making use of some of the newer x86 SIMD instruction
>> sets and realized that (a) we don't ever call cpuid on x86-64, we just
>> assume that MMX and SSE2 are present,
> I thought the amd64 ABI guaranteed MMX & SSE2 would always be present - is
> that not the case?

SSE2 seems to be required by the ABI, but I don't know why MMX would
(maybe x87 FPU is, and by extension MMX?).

I'm guessing here -- but since newer AMD chips dropped 3DNow, I would
think it'd be possible for future chips to drop MMX as well.

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