XvMC on savage
johng at as.arizona.edu
Wed Jan 10 02:13:07 PST 2007
On Tue, Jan 09, 2007 at 12:36:05AM +0200, Dag Nygren wrote:
>> I have the same problem with the Savage chipset in my MythTV machine, also in
>> the same Shuttle box as you.
>Nice to hear that I am not alone.
Same here. I emailed the list several weeks ago but never got a reply.
>> I think it might possibly be the fault of bad mtrr settings? I'm not sure. I
>> get several entries in the MTRR table after X starts:
>> reg00: base=0x00000000 ( 0MB), size= 512MB: write-back, count=1
>> reg01: base=0x1e000000 ( 480MB), size= 32MB: uncachable, count=1
>> reg02: base=0xd8000000 (3456MB), size= 64MB: write-combining, count=2
>> reg03: base=0xd0000000 (3328MB), size= 128MB: write-combining, count=3
>> reg05: base=0xd8000000 (3456MB), size= 64MB: write-combining, count=1
>Mine are as follows:
>reg00: base=0x00000000 ( 0MB), size= 512MB: write-back, count=1
>reg01: base=0x1e000000 ( 480MB), size= 32MB: uncachable, count=1
>reg02: base=0xe8000000 (3712MB), size= 64MB: write-combining, count=2
>reg03: base=0xe8000000 (3712MB), size= 64MB: write-combining, count=1
>reg04: base=0xe0000000 (3584MB), size= 32MB: write-combining, count=2
>reg05: base=0xe6000000 (3680MB), size= 16MB: write-combining, count=1
>reg06: base=0xe4000000 (3648MB), size= 32MB: write-combining, count=1
>reg07: base=0xe2000000 (3616MB), size= 32MB: write-combining, count=1
>The Display memory is at 0xe0000000 .
>> And this error message appears in the console log four times:
>> mtrr: base(0xd2000000) is not aligned on a size(0x5000000) boundary
>I also have this in the log, Seems to gladly allocate MTRR:s anyway.
>Wait a minute, you might be right, there is a hole in there.
>reg04 covering 0xe0000000 - 0xe1ffffff
>reg07 covering 0xe2000000 - 0xe3ffffff
>reg06 covering 0xe4000000 - 0xe5ffffff
>reg05 covering 0xe6000000 - 0xe6ffffff
>Hole for 0x70000000 - 0x7fffffff (!!)
>Have you tried setting this manually?
>Your MTRR:s look better though, provided that your board is located
>I will certainly do that tomorrow. Too late to try this evening.
I tried fiddling with the MTRRs manually a while back, but I didn't get
anywhere. That doesn't necessarily mean that I did it correctly, though.
In my X log I see:
(==) SAVAGE(0): Write-combining range (0xd0000000,0x8000000)
Which matches with the MTRR settings. The size is a bit high as I think I
only gave the card 32MB of memory (or maybe 64). And, of course, reg02 and
reg05 are the same for some reason.
The MTRR stuff could be a dead end. I only mention it beacause of the kernel
warning about MTRRs and the fact that on my system, and probably your's, the X
subsystem is the only thing besides the kernel which touches the MTRRs.
Hmmm... just now, looking at my X log more closely, I can see that my
machine's display memory is also at 0xe0000000. This makes sense seeing as
how we have the same machine. But also troubling since I have no MTRR set for
that range. Well... this could be the problem, no? It looks as though all
those 0xd0000000 MTRR settings are for the DRM and 3D memory.
Of course, you have MTRRs for that range (though possibly incomplete) and you
have the same problems as I do. Still, I'll see that and see what happens.
Unfortunately, I won't be home until next week.
--John Gruenenfelder Research Assistant, UMass Amherst student
Systems Manager, MKS Imaging Technology, LLC.
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