Intel driver fixes for 855GM - Crash switching VTs

Jesse Barnes jbarnes at
Mon Oct 22 14:12:28 PDT 2007

On Monday, October 22, 2007 1:35 pm Peter Clifton wrote:
> Attached is a patch which fixes crashes observed on all intel
> chipsets when switching VT in some conditions.
> The palette programming portion of this workaround (I say workaround,
> as it does prevent 100% complete restoration of HW regs in some
> cases) has already been pushed in a slightly different form by Jesse
> Barnes.
> Crashes specific to the 855 hardware were still seen, and those were
> avoided by avoiding writes to the PIPE[AB]CONF registers for
> pipelines with either the DPLL_VCO disabled, or the pipeline in VGA
> mode.
> e.g.:
> +   if ((pI830->saveDPLL_A & DPLL_VCO_ENABLE) &&
> +       (pI830->saveDPLL_A & DPLL_VGA_MODE_DIS))
> Without the official docs, it isn't clear whether this is just a
> contrived test which happens to avoid the PIPE[AB]CONF write on
> hardware where it causes the crash.
> Could someone comment on this, and whether a better solution might
> exist? Can we write the rest of the register if we don't touch the
> PIPE[AB]CONF_ENABLE bit for example?

According to the docs that should be ok.  But one wonders why we're 
restoring a zeroed DPLL state then enabling the pipe.  That seems bogus 
in the first place.  Maybe somehow the hardware is coming up with that 

> Should we special case the workaround to only prevent the
> PIPE[AB]CONF register writes on the 855 HW?

Having the write to the enable bit protected by a check against a sane 
DPLL value would be ok, but it would also be nice to know how were 
getting into this situation in the first place...


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