Intel driver fixes for 855GM - Crash switching VTs
pcjc2 at cam.ac.uk
Mon Oct 22 14:25:39 PDT 2007
On Mon, 2007-10-22 at 14:12 -0700, Jesse Barnes wrote:
> > Crashes specific to the 855 hardware were still seen, and those were
> > avoided by avoiding writes to the PIPE[AB]CONF registers for
> > pipelines with either the DPLL_VCO disabled, or the pipeline in VGA
> > mode.
> > e.g.:
> > - OUTREG(PIPEACONF, pI830->savePIPEACONF);
> > + if ((pI830->saveDPLL_A & DPLL_VCO_ENABLE) &&
> > + (pI830->saveDPLL_A & DPLL_VGA_MODE_DIS))
> > + OUTREG(PIPEACONF, pI830->savePIPEACONF);
> > Without the official docs, it isn't clear whether this is just a
> > contrived test which happens to avoid the PIPE[AB]CONF write on
> > hardware where it causes the crash.
> > Could someone comment on this, and whether a better solution might
> > exist? Can we write the rest of the register if we don't touch the
> > PIPE[AB]CONF_ENABLE bit for example?
> According to the docs that should be ok. But one wonders why we're
> restoring a zeroed DPLL state then enabling the pipe. That seems bogus
> in the first place. Maybe somehow the hardware is coming up with that
> > Should we special case the workaround to only prevent the
> > PIPE[AB]CONF register writes on the 855 HW?
> Having the write to the enable bit protected by a check against a sane
> DPLL value would be ok, but it would also be nice to know how were
> getting into this situation in the first place...
The crashes I observed were when the mode it was trying to restore had
the pipeline DPLL _enabled_, but set to VGA mode. (Is that a separate
pipeline to PIPEACONF?)
Xorg.0.log attached from the user who helped me test this. (ModeDebug
Electrical Engineering Division,
University of Cambridge,
9, JJ Thomson Avenue,
Tel: +44 (0)7729 980173 - (No signal in the lab!)
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