[PATCH] xf86-video-s3: DPMS an 1024x768 at 16bpp mode suport for S3 Trio64V2

[Alex Deucher]

On Sat, Feb 23, 2008 at 12:27 PM, Evgeny M. Zubok
<evgeny.zubok at tochka.ru> wrote:
> Hi!
>
>  This patch implements:
>
>  1. DPMS support for S3 Trio64V2. All other chips will use the default
>    vgaHWDPMSSet function as before. Probably new DPMS will work for
>    other S3 chips but I have only S3 Trio64V2.
>
>  2. 1024x768 at 16bpp support. It doesn't work before bacause the incorrect
>    clocks value was set for S3 Trio64V2.
>
>  3. New record in Changelog.
>
>
> diff --git a/ChangeLog b/ChangeLog
>  index e9e18a8..900b26f 100644
>  --- a/ChangeLog
>  +++ b/ChangeLog
>  @@ -1,3 +1,10 @@
>  +2008-02-23  Evgeny M. Zubok <evgeny.zubok at tochka.ru>
>  +
>  +       * src/s3_driver.c: Add DPMS support for S3 Trio64V2.
>  +       * src/s3_Trio64DAC: Change clocks for S3 Trio64V2 to make
>  +       the 1024x768 at 16bpp mode work.
>  +       Thanks to Richard Driscoll for these patches.
>  +
>   2006-04-07  Adam Jackson  <ajax at freedesktop.org>
>
>         * configure.ac:
>  diff --git a/src/s3_Trio64DAC.c b/src/s3_Trio64DAC.c
>  index cb4de3a..5bb8b3c 100644
>  --- a/src/s3_Trio64DAC.c
>  +++ b/src/s3_Trio64DAC.c
>  @@ -327,7 +327,7 @@ void S3Trio64DAC_Init(ScrnInfoPtr pScrn, DisplayModePtr mode)
>                                135000, 270000);
>         else if (pS3->Chipset == PCI_CHIP_TRIO64V2_DXGX)
>                 S3TrioSetClock(pScrn, mode->Clock, 2, 1, 1, 31, 0, 3, 2,
>  -                              170000, 270000);
>  +                              170000, 340000);
>         else
>                 S3TrioSetClock(pScrn, mode->Clock, 2, 1, 1, 31, 0, 3, 2,
>                                135000, 270000);
>  diff --git a/src/s3_driver.c b/src/s3_driver.c
>  index 924b073..be37bed 100644
>  --- a/src/s3_driver.c
>  +++ b/src/s3_driver.c
>  @@ -1847,11 +1847,45 @@ void S3BankZero(ScrnInfoPtr pScrn)
>         outb(vgaCRReg, tmp);
>   }
>
>  -
>  -
>  -static void S3DisplayPowerManagementSet(ScrnInfoPtr pScrn,
>  -                                       int PowerManagementMode, int flags)
>  +static void
>  +S3DisplayPowerManagementSet(ScrnInfoPtr pScrn, int PowerManagementMode,
>  +                           int flags)
>   {
>  -       vgaHWDPMSSet(pScrn, PowerManagementMode, flags);
>  +     S3Ptr pS3 = S3PTR(pScrn);
>  +     switch (pS3->Chipset) {
>  +     case PCI_CHIP_TRIO64V2_DXGX:
>  +     /* Probably others too - need testing */
>  +     /* case PCI_CHIP_TRIO: */
>  +     {
>  +         int srd;
>  +
>  +         outb(0x3c4, 0x08);
>  +         outb(0x3c5, 0x06);      /* unlock extended sequence registers */
>  +
>  +         outb(0x3c4, 0x0d);
>  +         srd = inb(0x3c5) & 0xf;  /* clear the sync control bits */
>  +
>  +         switch (PowerManagementMode) {
>  +         case DPMSModeOn:
>  +              /* Screen: On; HSync: On, VSync: On */
>  +              break;
>  +         case DPMSModeStandby:
>  +              /* Screen: Off; HSync: Off, VSync: On */
>  +              srd |= 0x10;
>  +              break;
>  +         case DPMSModeSuspend:
>  +              /* Screen: Off; HSync: On, VSync: Off */
>  +              srd |= 0x40;
>  +              break;
>  +         case DPMSModeOff:
>  +              /* Screen: Off; HSync: Off, VSync: Off */
>  +              srd |= 0x50;
>  +              break;
>  +         }
>  +         outb(0x3c4, 0x0d);
>  +         outb(0x3c5, srd);
>  +     }

I think you are missing a break here.  Also, FWIW, I think this should
work on other s3 chips with an integrated dac as well since savage and
virge work the same way.

Alex

>  +     default:
>  +         vgaHWDPMSSet(pScrn, PowerManagementMode, flags);
>  +     }
>   }
>  -
>
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