dri-devel January 2021

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v5.11-rc5 BUG kmalloc-1k (Not tainted): Redzone overwritten
by Jani Nikula 01 Feb '21

01 Feb '21

A number of our CI systems are hitting redzone overwritten errors after s2idle, with the errors introduced between v5.11-rc4 and v5.11-rc5. See snippet below, full logs for one affected machine at [1]. Known issue? BR, Jani. [1] https://intel-gfx-ci.01.org/tree/drm-intel-fixes/CI_DIF_549/fi-tgl-u2/igt@g… <6> [71.947160] Restarting tasks ... done. <3> [71.948035] ============================================================================= <3> [71.948545] BUG kmalloc-1k (Not tainted): Redzone overwritten <3> [71.948577] ----------------------------------------------------------------------------- <4> [71.948625] Disabling lock debugging due to kernel taint <3> [71.948626] INFO: 0x00000000de6e27d6-0x00000000eaa949e9 @offset=29696. First byte 0x0 instead of 0xcc <3> [71.948633] INFO: Allocated in syslog_print+0x39/0x200 age=1 cpu=6 pid=427 <3> [71.948642] __slab_alloc.isra.86.constprop.94+0x7e/0x90 <3> [71.948647] kmem_cache_alloc_trace+0x337/0x420 <3> [71.948651] syslog_print+0x39/0x200 <3> [71.948654] do_syslog.part.23+0x31a/0x480 <3> [71.948658] kmsg_read+0x3c/0x50 <3> [71.948663] vfs_read+0xa8/0x1b0 <3> [71.948667] ksys_read+0x5a/0xd0 <3> [71.948670] do_syscall_64+0x33/0x80 <3> [71.948674] entry_SYSCALL_64_after_hwframe+0x44/0xa9 <3> [71.948679] INFO: Freed in kfree_rcu_work+0x2ef/0x320 age=658 cpu=3 pid=195 <3> [71.948685] kmem_cache_free_bulk+0xbeb/0xcb0 <3> [71.948689] kfree_rcu_work+0x2ef/0x320 <3> [71.948693] process_one_work+0x270/0x5c0 <3> [71.948697] worker_thread+0x37/0x380 <3> [71.948701] kthread+0x146/0x170 <3> [71.948705] ret_from_fork+0x1f/0x30 <3> [71.948709] INFO: Slab 0x0000000097533187 objects=10 used=9 fp=0x000000002183a6cf flags=0x8000000000010201 <3> [71.948714] INFO: Object 0x00000000b43421a9 @offset=28672 fp=0x0000000000000000 <3> [71.948720] Redzone 0000000034747f33: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948726] Redzone 000000001c57bf27: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948731] Redzone 000000006763eea0: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948736] Redzone 0000000028c40de8: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948742] Redzone 00000000c8e197cc: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948747] Redzone 000000008b77f05a: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948752] Redzone 000000003e1a5f65: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948757] Redzone 00000000568b4b04: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948762] Redzone 00000000183f376e: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948767] Redzone 000000003aafec8b: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948773] Redzone 00000000ec8d8c96: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948779] Redzone 0000000054f062b1: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948784] Redzone 0000000044f67988: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948790] Redzone 00000000f7a07bd6: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948796] Redzone 000000004719a4f1: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948801] Redzone 0000000006a35936: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948807] Redzone 00000000f8aefa64: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948812] Redzone 000000008550e102: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948817] Redzone 000000009189a7a1: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948823] Redzone 000000007a3b9eea: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948828] Redzone 00000000ab035e44: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948834] Redzone 0000000001d5ee40: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948840] Redzone 000000009c676a9c: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948845] Redzone 00000000309ce2cf: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948850] Redzone 00000000f620b753: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948855] Redzone 00000000082c33d0: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948860] Redzone 00000000498e33d7: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948866] Redzone 000000003d9447fb: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948871] Redzone 00000000cc09fd51: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948876] Redzone 0000000012ee8ab4: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948882] Redzone 000000000c3cb11f: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948887] Redzone 00000000c23c0cd7: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948892] Redzone 00000000405a6bbe: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948898] Redzone 00000000cb0b2944: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948903] Redzone 0000000005cb64af: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948909] Redzone 000000002ef8bc07: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948914] Redzone 00000000f637775f: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948919] Redzone 00000000be66d756: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948925] Redzone 0000000095fb1706: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948930] Redzone 0000000025614f61: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948936] Redzone 00000000afdeea6a: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948941] Redzone 0000000056959541: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948946] Redzone 00000000355ca70e: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948951] Redzone 000000008d98fe16: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948956] Redzone 00000000e6975090: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948962] Redzone 0000000061490b2f: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948967] Redzone 0000000048854715: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948972] Redzone 00000000b7f710a5: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948978] Redzone 000000008432ad5e: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948984] Redzone 00000000b31e7b55: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948989] Redzone 0000000070dee095: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.948994] Redzone 00000000a11d967f: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.949001] Redzone 00000000e60693ff: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.949006] Redzone 000000009d0156db: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.949011] Redzone 00000000d71fff83: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.949017] Redzone 00000000b7d1b056: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.949022] Redzone 0000000001a7a74e: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.949028] Redzone 00000000d1d10885: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.949033] Redzone 000000006c77cfec: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.949038] Redzone 000000008b6aa188: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.949043] Redzone 0000000035290da4: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.949049] Redzone 000000002f67eeb9: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.949055] Redzone 00000000697dbaea: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.949060] Redzone 000000000604ac79: cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc cc ................ <3> [71.949064] Object 00000000b43421a9: 3c 37 3e 5b 20 20 20 37 31 2e 31 39 34 30 39 34 <7>[ 71.194094 <3> [71.949070] Object 0000000076a337ed: 5d 20 69 39 31 35 20 30 30 30 30 3a 30 30 3a 30 ] i915 0000:00:0 <3> [71.949074] Object 00000000b904f286: 32 2e 30 3a 20 5b 64 72 6d 3a 69 6e 74 65 6c 5f 2.0: [drm:intel_ <3> [71.949078] Object 0000000003506053: 6d 6f 64 65 73 65 74 5f 73 65 74 75 70 5f 68 77 modeset_setup_hw <3> [71.949082] Object 00000000fe226394: 5f 73 74 61 74 65 20 5b 69 39 31 35 5d 5d 20 5b _state [i915]] [ <3> [71.949086] Object 0000000062d81a38: 50 4c 41 4e 45 3a 34 39 3a 70 6c 61 6e 65 20 33 PLANE:49:plane 3 <3> [71.949090] Object 0000000021b4eadc: 41 5d 20 68 77 20 73 74 61 74 65 20 72 65 61 64 A] hw state read <3> [71.949095] Object 000000003e076754: 6f 75 74 3a 20 64 69 73 61 62 6c 65 64 2c 20 70 out: disabled, p <3> [71.949099] Object 000000009a47e07e: 69 70 65 20 41 0a 00 67 65 20 6c 65 76 65 6c 20 ipe A..ge level <3> [71.949104] Object 00000000dca76905: 30 0a 00 30 30 30 30 31 2c 20 50 50 5f 4f 46 46 0..00001, PP_OFF <3> [71.949109] Object 00000000798e1fed: 20 30 78 31 66 34 30 30 30 31 2c 20 50 50 5f 44 0x1f40001, PP_D <3> [71.949114] Object 000000001f9636fb: 49 56 20 30 78 36 30 0a 00 30 34 35 30 36 32 5d IV 0x60..045062] <3> [71.949119] Object 0000000020ccf31f: 20 20 20 20 65 64 70 5f 70 61 6e 65 6c 5f 76 64 edp_panel_vd <3> [71.949124] Object 00000000e3259c3e: 64 5f 6f 6e 2b 30 78 64 35 2f 30 78 32 32 30 20 d_on+0xd5/0x220 <3> [71.949129] Object 000000009cff5aa5: 5b 69 39 31 35 5d 0a 3c 37 3e 5b 20 20 20 35 36 [i915].<7>[ 56 <3> [71.949134] Object 0000000050aadeb4: 2e 30 34 35 30 36 32 5d 20 20 20 20 69 6e 74 65 .045062] inte <3> [71.949140] Object 00000000dbbff70e: 6c 5f 64 70 5f 61 75 78 5f 78 66 65 72 2b 30 78 l_dp_aux_xfer+0x <3> [71.949145] Object 000000007d9c4ceb: 66 32 2f 30 78 39 39 30 20 5b 69 39 31 35 5d 0a f2/0x990 [i915]. <3> [71.949150] Object 0000000089d597be: 3c 37 3e 5b 20 20 20 35 36 2e 30 34 35 30 36 32 <7>[ 56.045062 <3> [71.949156] Object 000000005fc0d532: 5d 20 20 20 20 69 6e 74 65 6c 5f 64 70 5f 61 75 ] intel_dp_au <3> [71.949161] Object 00000000d89adaef: 78 5f 74 72 61 6e 73 66 65 72 2b 30 78 63 35 2f x_transfer+0xc5/ <3> [71.949166] Object 00000000d57bf831: 30 78 32 62 30 20 5b 69 39 31 35 5d 0a 3c 37 3e 0x2b0 [i915].<7> <3> [71.949171] Object 000000002b96b18c: 5b 20 20 20 35 36 2e 30 34 35 30 36 32 5d 20 20 [ 56.045062] <3> [71.949176] Object 00000000cc13ca36: 20 20 64 72 6d 5f 64 70 5f 64 70 63 64 5f 61 63 drm_dp_dpcd_ac <3> [71.949180] Object 000000007bcfe1cd: 63 65 73 73 2b 30 78 37 36 2f 30 78 31 31 30 0a cess+0x76/0x110. <3> [71.949186] Object 00000000169f55ae: 3c 37 3e 5b 20 20 20 35 36 2e 30 34 35 30 36 32 <7>[ 56.045062 <3> [71.949189] Object 000000003a7dcbbf: 5d 20 20 20 20 64 72 6d 5f 64 70 5f 64 70 63 64 ] drm_dp_dpcd <3> [71.949193] Object 00000000bbb69343: 5f 72 65 61 64 2b 30 78 62 31 2f 30 78 66 30 0a _read+0xb1/0xf0. <3> [71.949196] Object 000000001805f88f: 3c 37 3e 5b 20 20 20 35 36 2e 30 34 35 30 36 32 <7>[ 56.045062 <3> [71.949199] Object 00000000550e6f19: 5d 20 20 20 20 69 39 31 35 5f 70 73 72 5f 73 69 ] i915_psr_si <3> [71.949202] Object 0000000049b0ed43: 6e 6b 5f 73 74 61 74 75 73 5f 73 68 6f 77 2b 30 nk_status_show+0 <3> [71.949206] Object 00000000d5d71bdf: 78 38 36 2f 30 78 31 31 30 20 5b 69 39 31 35 5d x86/0x110 [i915] <3> [71.949209] Object 000000006f615c99: 0a 20 20 20 70 63 69 5f 64 65 76 69 63 65 5f 70 . pci_device_p <3> [71.949213] Object 0000000039df9783: 72 6f 62 65 2b 30 78 39 65 2f 30 78 31 31 30 0a robe+0x9e/0x110. <3> [71.949216] Object 000000004945c274: 0a 5b 69 39 31 35 5d 0a 6b 6b 6b 6b 6b 6b 6b 6b .[i915].kkkkkkkk <3> [71.949219] Object 00000000ad856344: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949222] Object 00000000d63c4370: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949225] Object 0000000061521159: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949229] Object 0000000000719c9c: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949232] Object 000000006e01f6a3: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949237] Object 00000000dd723dd7: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949242] Object 0000000084b814fe: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949246] Object 00000000da848a49: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949249] Object 00000000b635c9d6: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949252] Object 000000002aa24fce: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949255] Object 0000000027057d8a: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949259] Object 0000000074ed199b: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949262] Object 000000000ee8ecde: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949265] Object 00000000e71ca5e0: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949269] Object 00000000646dc0d8: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949272] Object 000000002bb9ee7f: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949275] Object 0000000036436b5f: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949279] Object 00000000d68c6ad6: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949283] Object 00000000a23a7f73: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949286] Object 00000000b6b8090e: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949289] Object 000000009d19ef4c: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949293] Object 000000008e828f78: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949296] Object 000000008741608b: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949299] Object 000000005f8aa86c: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949302] Object 00000000d35b3d05: 6b 6b 6b 6b 6b 6b 00 6b 6b 6b 6b 6b 6b 6b 00 6b kkkkkk.kkkkkkk.k <3> [71.949306] Object 000000009119c370: 6b 00 6b 6b 6b 00 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b k.kkk.kkkkkkkkkk <3> [71.949309] Object 00000000c12a97d0: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 00 6b 6b kkkkkkkkkkkkk.kk <3> [71.949312] Object 0000000018139d84: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b kkkkkkkkkkkkkkkk <3> [71.949315] Object 00000000ae52880d: 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b 6b a5 kkkkkkkkkkkkkkk. <3> [71.949319] Redzone 00000000de6e27d6: 00 cc cc cc cc 00 cc cc ........ <3> [71.949322] Padding 00000000be515b2e: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949325] Padding 00000000522f2b68: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949328] Padding 0000000058095864: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949332] Padding 00000000b22f50cd: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949335] Padding 0000000023ad6f31: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949338] Padding 0000000025037d9c: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949341] Padding 000000006cb6fadf: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949345] Padding 00000000d3241db4: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949349] Padding 00000000b89cc259: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949352] Padding 0000000077f625c7: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949355] Padding 00000000282da081: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949358] Padding 000000002ed67ea5: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949362] Padding 00000000fed5aa7f: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949365] Padding 000000008f0c9030: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949369] Padding 00000000dceaa693: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949372] Padding 000000004263f632: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949375] Padding 00000000588c1f07: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949378] Padding 0000000072202764: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949382] Padding 000000001fe2275d: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949385] Padding 00000000a2c18ef6: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949388] Padding 00000000f3e21327: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949392] Padding 000000002ff834bf: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949395] Padding 000000001ce1906f: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949398] Padding 0000000031df4f7d: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949401] Padding 00000000e66c500a: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949405] Padding 00000000893d41e9: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949408] Padding 00000000143e4ae4: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949411] Padding 00000000f0df9dc9: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949415] Padding 00000000aa244b0b: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949418] Padding 00000000346d0950: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949421] Padding 00000000d307dcef: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949425] Padding 000000004dbc1a51: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949428] Padding 0000000090f10400: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949431] Padding 00000000dd19313e: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949434] Padding 00000000735b7de4: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949438] Padding 000000006bf296ae: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949441] Padding 00000000f09e7ed5: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949444] Padding 00000000707c3646: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949448] Padding 00000000baa65428: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949451] Padding 00000000b96e127a: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949454] Padding 000000009f0d3f66: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949457] Padding 000000005e8e4d78: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949461] Padding 0000000044d8e23c: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <3> [71.949464] Padding 000000007166274c: 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a 5a ZZZZZZZZZZZZZZZZ <4> [71.949467] CPU: 6 PID: 427 Comm: in:imklog Tainted: G B 5.11.0-rc5-g6ee1d745b7c9f-CI_DIF_549+ #1 <4> [71.949469] Hardware name: Intel Corporation Tiger Lake Client Platform/TigerLake U DDR4 SODIMM RVP, BIOS TGLSFWI1.R00.3373.A00.2009091720 09/09/2020 <4> [71.949470] Call Trace: <4> [71.949471] dump_stack+0x77/0x97 <4> [71.949474] check_bytes_and_report.cold.107+0x55/0x8c <4> [71.949478] check_object+0x19c/0x280 <4> [71.949480] free_debug_processing+0x157/0x320 <4> [71.949482] ? syslog_print+0x1c0/0x200 <4> [71.949484] __slab_free+0x1ef/0x540 <4> [71.949486] ? debug_check_no_obj_freed+0x111/0x1e0 <4> [71.949489] ? kfree+0x231/0x720 <4> [71.949491] ? syslog_print+0x1c0/0x200 <4> [71.949492] syslog_print+0x1c0/0x200 <4> [71.949494] do_syslog.part.23+0x31a/0x480 <4> [71.949496] ? __mutex_lock+0xa6/0x980 <4> [71.949497] ? __mutex_lock+0x29a/0x980 <4> [71.949498] ? find_held_lock+0x2d/0x90 <4> [71.949500] ? __fdget_pos+0x45/0x50 <4> [71.949502] kmsg_read+0x3c/0x50 <4> [71.949504] vfs_read+0xa8/0x1b0 <4> [71.949505] ksys_read+0x5a/0xd0 <4> [71.949507] do_syscall_64+0x33/0x80 <4> [71.949508] entry_SYSCALL_64_after_hwframe+0x44/0xa9 <4> [71.949510] RIP: 0033:0x7faf0694b384 <4> [71.949512] Code: 84 00 00 00 00 00 41 54 55 49 89 d4 53 48 89 f5 89 fb 48 83 ec 10 e8 8b fc ff ff 4c 89 e2 41 89 c0 48 89 ee 89 df 31 c0 0f 05 <48> 3d 00 f0 ff ff 77 38 44 89 c7 48 89 44 24 08 e8 c7 fc ff ff 48 <4> [71.949513] RSP: 002b:00007faf03a784c0 EFLAGS: 00000246 ORIG_RAX: 0000000000000000 <4> [71.949515] RAX: ffffffffffffffda RBX: 0000000000000005 RCX: 00007faf0694b384 <4> [71.949516] RDX: 0000000000001fa0 RSI: 00007faf03a78d00 RDI: 0000000000000005 <4> [71.949517] RBP: 00007faf03a78d00 R08: 0000000000000000 R09: 0000561e117f8fe8 <4> [71.949518] R10: 2ce33e6c02ce33e7 R11: 0000000000000246 R12: 0000000000001fa0 <4> [71.949519] R13: 0000000000001fa0 R14: 0000000000001f9f R15: 00007faf03a7ab18 <3> [71.949521] FIX kmalloc-1k: Restoring 0x00000000de6e27d6-0x00000000eaa949e9=0xcc <3> [71.949529] FIX kmalloc-1k: Object at 0x00000000b43421a9 not freed -- Jani Nikula, Intel Open Source Graphics Center

2 1

[PATCH] drm/msm/mdp5: Fix wait-for-commit for cmd panels
by Iskren Chernev 01 Feb '21

01 Feb '21

Before the offending commit in msm_atomic_commit_tail wait_flush was called once per frame, after the commit was submitted. After it wait_flush is also called at the beginning to ensure previous potentially async commits are done. For cmd panels the source of wait_flush is a ping-pong irq notifying a completion. The completion needs to be notified with complete_all so multiple waiting parties (new async committers) can proceed. Signed-off-by: Iskren Chernev <iskren.chernev(a)gmail.com> Suggested-by: Rob Clark <robdclark(a)gmail.com> Fixes: 2d99ced787e3d ("drm/msm: async commit support") --- drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c b/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c index 0c8f9f88301fa..f5d71b2740793 100644 --- a/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c +++ b/drivers/gpu/drm/msm/disp/mdp5/mdp5_crtc.c @@ -1180,7 +1180,7 @@ static void mdp5_crtc_pp_done_irq(struct mdp_irq *irq, uint32_t irqstatus) struct mdp5_crtc *mdp5_crtc = container_of(irq, struct mdp5_crtc, pp_done); - complete(&mdp5_crtc->pp_completion); + complete_all(&mdp5_crtc->pp_completion); } static void mdp5_crtc_wait_for_pp_done(struct drm_crtc *crtc) base-commit: 59fa6a163ffabc1bf25c5e0e33899e268a96d3cc -- 2.30.0

4 3

[PATCH] drm/i915: Remove unreachable code
by Vinicius Tinti 01 Feb '21

01 Feb '21

By enabling -Wunreachable-code-aggressive on Clang the following code paths are unreachable. Commit ce22c320b8ca ("drm/i915/sdvo: convert to encoder disable/enable") Commit 19f1f627b333 ("drm/i915/gt: Move ivb GT workarounds from init_clock_gating to workarounds") Commit 0a97015d45ee ("drm/i915: Compress GPU objects in error state") By removing the unreachable code at drivers/gpu/drm/i915/display/intel_sdvo.c the function intel_sdvo_set_encoder_power_state becomes unused. Commit ea5b213ad4b1 ("drm/i915: Subclass intel_encoder.") Clang warns unreachable: drivers/gpu/drm/i915/display/intel_sdvo.c:1768:3: warning: code will never be executed [-Wunreachable-code] intel_sdvo_set_encoder_power_state(intel_sdvo, ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/i915/display/intel_sdvo.c:1767:6: note: silence by adding parentheses to mark code as explicitly dead if (0) ^ /* DISABLES CODE */ ( ) drivers/gpu/drm/i915/display/intel_sdvo.c:1852:3: warning: code will never be executed [-Wunreachable-code] intel_sdvo_set_encoder_power_state(intel_sdvo, ^~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~~ drivers/gpu/drm/i915/display/intel_sdvo.c:1851:6: note: silence by adding parentheses to mark code as explicitly dead if (0) ^ /* DISABLES CODE */ ( ) drivers/gpu/drm/i915/gt/intel_workarounds.c:884:3: warning: code will never be executed [-Wunreachable-code] wa_masked_dis(wal, CACHE_MODE_0_GEN7, HIZ_RAW_STALL_OPT_DISABLE); ^~~~~~~~~~~~~ drivers/gpu/drm/i915/gt/intel_workarounds.c:882:6: note: silence by adding parentheses to mark code as explicitly dead if (0) { /* causes HiZ corruption on ivb:gt1 */ ^ /* DISABLES CODE */ ( ) drivers/gpu/drm/i915/i915_gpu_error.c:319:11: warning: code will never be executed [-Wunreachable-code] if (0 && zstream->total_out > zstream->total_in) ^~~~~~~ drivers/gpu/drm/i915/i915_gpu_error.c:319:6: note: silence by adding parentheses to mark code as explicitly dead if (0 && zstream->total_out > zstream->total_in) ^ /* DISABLES CODE */ ( ) Clang warns unused after removing unreachable: drivers/gpu/drm/i915/display/intel_sdvo.c:696:13: warning: unused function 'intel_sdvo_set_encoder_power_state' [-Wunused-function] static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, ^ Signed-off-by: Vinicius Tinti <viniciustinti(a)gmail.com> --- drivers/gpu/drm/i915/display/intel_sdvo.c | 30 --------------------- drivers/gpu/drm/i915/gt/intel_workarounds.c | 5 ---- drivers/gpu/drm/i915/i915_gpu_error.c | 4 --- 3 files changed, 39 deletions(-) diff --git a/drivers/gpu/drm/i915/display/intel_sdvo.c b/drivers/gpu/drm/i915/display/intel_sdvo.c index 4eaa4aa86ecd..45d03b09f8f0 100644 --- a/drivers/gpu/drm/i915/display/intel_sdvo.c +++ b/drivers/gpu/drm/i915/display/intel_sdvo.c @@ -693,30 +693,6 @@ static bool intel_sdvo_get_active_outputs(struct intel_sdvo *intel_sdvo, outputs, sizeof(*outputs)); } -static bool intel_sdvo_set_encoder_power_state(struct intel_sdvo *intel_sdvo, - int mode) -{ - u8 state = SDVO_ENCODER_STATE_ON; - - switch (mode) { - case DRM_MODE_DPMS_ON: - state = SDVO_ENCODER_STATE_ON; - break; - case DRM_MODE_DPMS_STANDBY: - state = SDVO_ENCODER_STATE_STANDBY; - break; - case DRM_MODE_DPMS_SUSPEND: - state = SDVO_ENCODER_STATE_SUSPEND; - break; - case DRM_MODE_DPMS_OFF: - state = SDVO_ENCODER_STATE_OFF; - break; - } - - return intel_sdvo_set_value(intel_sdvo, - SDVO_CMD_SET_ENCODER_POWER_STATE, &state, sizeof(state)); -} - static bool intel_sdvo_get_input_pixel_clock_range(struct intel_sdvo *intel_sdvo, int *clock_min, int *clock_max) @@ -1764,9 +1740,6 @@ static void intel_disable_sdvo(struct intel_atomic_state *state, intel_sdvo_disable_audio(intel_sdvo); intel_sdvo_set_active_outputs(intel_sdvo, 0); - if (0) - intel_sdvo_set_encoder_power_state(intel_sdvo, - DRM_MODE_DPMS_OFF); temp = intel_de_read(dev_priv, intel_sdvo->sdvo_reg); @@ -1848,9 +1821,6 @@ static void intel_enable_sdvo(struct intel_atomic_state *state, "sync\n", SDVO_NAME(intel_sdvo)); } - if (0) - intel_sdvo_set_encoder_power_state(intel_sdvo, - DRM_MODE_DPMS_ON); intel_sdvo_set_active_outputs(intel_sdvo, intel_sdvo->attached_output); if (pipe_config->has_audio) diff --git a/drivers/gpu/drm/i915/gt/intel_workarounds.c b/drivers/gpu/drm/i915/gt/intel_workarounds.c index adc9a8ea410a..d60ff2c67138 100644 --- a/drivers/gpu/drm/i915/gt/intel_workarounds.c +++ b/drivers/gpu/drm/i915/gt/intel_workarounds.c @@ -879,11 +879,6 @@ ivb_gt_workarounds_init(struct drm_i915_private *i915, struct i915_wa_list *wal) GEN7_FF_VS_SCHED_HW | GEN7_FF_DS_SCHED_HW); - if (0) { /* causes HiZ corruption on ivb:gt1 */ - /* enable HiZ Raw Stall Optimization */ - wa_masked_dis(wal, CACHE_MODE_0_GEN7, HIZ_RAW_STALL_OPT_DISABLE); - } - /* WaDisable4x2SubspanOptimization:ivb */ wa_masked_en(wal, CACHE_MODE_1, PIXEL_SUBSPAN_COLLECT_OPT_DISABLE); diff --git a/drivers/gpu/drm/i915/i915_gpu_error.c b/drivers/gpu/drm/i915/i915_gpu_error.c index d8cac4c5881f..6ec699da1dc2 100644 --- a/drivers/gpu/drm/i915/i915_gpu_error.c +++ b/drivers/gpu/drm/i915/i915_gpu_error.c @@ -315,10 +315,6 @@ static int compress_page(struct i915_vma_compress *c, cond_resched(); } while (zstream->avail_in); - /* Fallback to uncompressed if we increase size? */ - if (0 && zstream->total_out > zstream->total_in) - return -E2BIG; - return 0; } -- 2.25.1

2 4

[PATCH v2, 0/3] support gce on mt8192 platform
by Yongqiang Niu 31 Jan '21

31 Jan '21

Change since v1: - move out shit jump patch - rmove usless patch Yongqiang Niu (3): dt-binding: gce: add gce header file for mt8192 arm64: dts: mt8192: add gce node mailbox: cmdq: add mt8192 support .../devicetree/bindings/mailbox/mtk-gce.txt | 7 +- arch/arm64/boot/dts/mediatek/mt8192.dtsi | 10 + drivers/mailbox/mtk-cmdq-mailbox.c | 1 + include/dt-bindings/gce/mt8192-gce.h | 419 +++++++++++++++++++++ 4 files changed, 434 insertions(+), 3 deletions(-) create mode 100644 include/dt-bindings/gce/mt8192-gce.h -- 1.8.1.1.dirty

4 7

[RFC PATCH] drm/rockchip: vop_reg: add rk3036 hdmi support
by Johan Jonker 31 Jan '21

31 Jan '21

A Rockchip Inno HDMI driver was added, but the rk3036 VOP regs with HDMI support in the manufacturer tree never made it to the mainline kernel. This patch adds only hdmi_en and hdmi_dclk_pol. The inno hdmi driver must set hdmi_pin_pol in GRF_SOC_CON2. Signed-off-by: Johan Jonker <jbx6244(a)gmail.com> --- Not tested with hardware --- drivers/gpu/drm/rockchip/rockchip_vop_reg.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c index 0697057e7..c164690a1 100644 --- a/drivers/gpu/drm/rockchip/rockchip_vop_reg.c +++ b/drivers/gpu/drm/rockchip/rockchip_vop_reg.c @@ -147,6 +147,8 @@ static const struct vop_modeset rk3036_modeset = { static const struct vop_output rk3036_output = { .pin_pol = VOP_REG(RK3036_DSP_CTRL0, 0xf, 4), + .hdmi_en = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 22), + .hdmi_dclk_pol = VOP_REG(RK3036_AXI_BUS_CTRL, 0x1, 23), }; static const struct vop_common rk3036_common = { -- 2.11.0

1 0

[PATCH] soc: mediatek: cmdq: Remove cmdq_pkt_flush()
by Chun-Kuang Hu 31 Jan '21

31 Jan '21

rx_callback is a standard mailbox callback mechanism and could cover the function of proprietary cmdq_task_cb, so it is better to use the standard one instead of the proprietary one. But register rx_callback should before mbox_request_channel(), so remove cmdq_pkt_flush() and let client driver implement its own synchronous flush. Signed-off-by: Chun-Kuang Hu <chunkuang.hu(a)kernel.org> --- drivers/soc/mediatek/mtk-cmdq-helper.c | 32 -------------------------- include/linux/soc/mediatek/mtk-cmdq.h | 12 ---------- 2 files changed, 44 deletions(-) diff --git a/drivers/soc/mediatek/mtk-cmdq-helper.c b/drivers/soc/mediatek/mtk-cmdq-helper.c index 505651b0d715..fd3bc39538a1 100644 --- a/drivers/soc/mediatek/mtk-cmdq-helper.c +++ b/drivers/soc/mediatek/mtk-cmdq-helper.c @@ -502,36 +502,4 @@ int cmdq_pkt_flush_async(struct cmdq_pkt *pkt, cmdq_async_flush_cb cb, } EXPORT_SYMBOL(cmdq_pkt_flush_async); -struct cmdq_flush_completion { - struct completion cmplt; - bool err; -}; - -static void cmdq_pkt_flush_cb(struct cmdq_cb_data data) -{ - struct cmdq_flush_completion *cmplt; - - cmplt = (struct cmdq_flush_completion *)data.data; - if (data.sta != CMDQ_CB_NORMAL) - cmplt->err = true; - else - cmplt->err = false; - complete(&cmplt->cmplt); -} - -int cmdq_pkt_flush(struct cmdq_pkt *pkt) -{ - struct cmdq_flush_completion cmplt; - int err; - - init_completion(&cmplt.cmplt); - err = cmdq_pkt_flush_async(pkt, cmdq_pkt_flush_cb, &cmplt); - if (err < 0) - return err; - wait_for_completion(&cmplt.cmplt); - - return cmplt.err ? -EFAULT : 0; -} -EXPORT_SYMBOL(cmdq_pkt_flush); - MODULE_LICENSE("GPL v2"); diff --git a/include/linux/soc/mediatek/mtk-cmdq.h b/include/linux/soc/mediatek/mtk-cmdq.h index 960704d75994..2c6aa84c0e80 100644 --- a/include/linux/soc/mediatek/mtk-cmdq.h +++ b/include/linux/soc/mediatek/mtk-cmdq.h @@ -288,16 +288,4 @@ int cmdq_pkt_finalize(struct cmdq_pkt *pkt); int cmdq_pkt_flush_async(struct cmdq_pkt *pkt, cmdq_async_flush_cb cb, void *data); -/** - * cmdq_pkt_flush() - trigger CMDQ to execute the CMDQ packet - * @pkt: the CMDQ packet - * - * Return: 0 for success; else the error code is returned - * - * Trigger CMDQ to execute the CMDQ packet. Note that this is a - * synchronous flush function. When the function returned, the recorded - * commands have been done. - */ -int cmdq_pkt_flush(struct cmdq_pkt *pkt); - #endif /* __MTK_CMDQ_H__ */ -- 2.17.1

2 3

[PATCH v4 0/8] drm/mediatek: add support for mediatek SOC MT8192
by Hsin-Yi Wang 31 Jan '21

31 Jan '21

This series are based on kernel/git/chunkuang.hu/linux.git mediatek-drm-next This series also depends on component support in mmsys[1]: - [v4,06/10] soc: mediatek: mmsys: add component OVL_2L2 - [v4,07/10] soc: mediatek: mmsys: add component POSTMASK - [v4,08/10] soc: mediatek: mmsys: add component RDMA4 [1] https://patchwork.kernel.org/project/linux-mediatek/patch/1609815993-22744-… Change since v3: - change several function to rebase to mediatek-drm-next - drop pm runtime patches due to it's not related to mt8192 support - fix review comments in v3 Changes since v2: - fix review comment in v2 - add pm runtime for gamma and color - move ddp path select patch to mmsys series - remove some useless patch Yongqiang Niu (8): drm/mediatek: add component OVL_2L2 drm/mediatek: add component POSTMASK drm/mediatek: add component RDMA4 drm/mediatek: enable OVL_LAYER_SMI_ID_EN for multi-layer usecase drm/mediatek: separate ccorr module drm/mediatek: add matrix bits private data for ccorr soc: mediatek: add mtk mutex support for MT8192 drm/mediatek: add support for mediatek SOC MT8192 drivers/gpu/drm/mediatek/Makefile | 4 +- drivers/gpu/drm/mediatek/mtk_disp_ccorr.c | 244 +++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_disp_drv.h | 17 ++ drivers/gpu/drm/mediatek/mtk_disp_ovl.c | 37 +++ drivers/gpu/drm/mediatek/mtk_disp_postmask.c | 162 ++++++++++++ drivers/gpu/drm/mediatek/mtk_disp_rdma.c | 6 + drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.c | 108 ++------ drivers/gpu/drm/mediatek/mtk_drm_ddp_comp.h | 1 + drivers/gpu/drm/mediatek/mtk_drm_drv.c | 52 +++- drivers/gpu/drm/mediatek/mtk_drm_drv.h | 2 + drivers/soc/mediatek/mtk-mutex.c | 35 +++ 11 files changed, 572 insertions(+), 96 deletions(-) create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_ccorr.c create mode 100644 drivers/gpu/drm/mediatek/mtk_disp_postmask.c -- 2.30.0.365.g02bc693789-goog

4 19

[PATCH] drm/ttm: Use __GFP_NOWARN for huge pages in ttm_pool_alloc_page
by Michel Dänzer 31 Jan '21

31 Jan '21

From: Michel Dänzer <mdaenzer(a)redhat.com> Without __GFP_NOWARN, attempts at allocating huge pages can trigger dmesg splats like below (which are essentially noise, since TTM falls back to normal pages if it can't get a huge one). [ 9556.710241] clinfo: page allocation failure: order:9, mode:0x194dc2(GFP_HIGHUSER|__GFP_RETRY_MAYFAIL|__GFP_NORETRY|__GFP_ZERO|__GFP_NOMEMALLOC), nodemask=(null),cpuset=user.slice,mems_allowed=0 [ 9556.710259] CPU: 1 PID: 470821 Comm: clinfo Tainted: G E 5.10.10+ #4 [ 9556.710264] Hardware name: Micro-Star International Co., Ltd. MS-7A34/B350 TOMAHAWK (MS-7A34), BIOS 1.OR 11/29/2019 [ 9556.710268] Call Trace: [ 9556.710281] dump_stack+0x6b/0x83 [ 9556.710288] warn_alloc.cold+0x7b/0xdf [ 9556.710297] ? __alloc_pages_direct_compact+0x137/0x150 [ 9556.710303] __alloc_pages_slowpath.constprop.0+0xc1b/0xc50 [ 9556.710312] __alloc_pages_nodemask+0x2ec/0x320 [ 9556.710325] ttm_pool_alloc+0x2e4/0x5e0 [ttm] [ 9556.710332] ? kvmalloc_node+0x46/0x80 [ 9556.710341] ttm_tt_populate+0x37/0xe0 [ttm] [ 9556.710350] ttm_bo_handle_move_mem+0x142/0x180 [ttm] [ 9556.710359] ttm_bo_validate+0x11d/0x190 [ttm] [ 9556.710391] ? drm_vma_offset_add+0x2f/0x60 [drm] [ 9556.710399] ttm_bo_init_reserved+0x2a7/0x320 [ttm] [ 9556.710529] amdgpu_bo_do_create+0x1b8/0x500 [amdgpu] [ 9556.710657] ? amdgpu_bo_subtract_pin_size+0x60/0x60 [amdgpu] [ 9556.710663] ? get_page_from_freelist+0x11f9/0x1450 [ 9556.710789] amdgpu_bo_create+0x40/0x270 [amdgpu] [ 9556.710797] ? _raw_spin_unlock+0x16/0x30 [ 9556.710927] amdgpu_gem_create_ioctl+0x123/0x310 [amdgpu] [ 9556.711062] ? amdgpu_gem_force_release+0x150/0x150 [amdgpu] [ 9556.711098] drm_ioctl_kernel+0xaa/0xf0 [drm] [ 9556.711133] drm_ioctl+0x20f/0x3a0 [drm] [ 9556.711267] ? amdgpu_gem_force_release+0x150/0x150 [amdgpu] [ 9556.711276] ? preempt_count_sub+0x9b/0xd0 [ 9556.711404] amdgpu_drm_ioctl+0x49/0x80 [amdgpu] [ 9556.711411] __x64_sys_ioctl+0x83/0xb0 [ 9556.711417] do_syscall_64+0x33/0x80 [ 9556.711421] entry_SYSCALL_64_after_hwframe+0x44/0xa9 Fixes: bf9eee249ac2 ("drm/ttm: stop using GFP_TRANSHUGE_LIGHT") Signed-off-by: Michel Dänzer <mdaenzer(a)redhat.com> --- drivers/gpu/drm/ttm/ttm_pool.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/ttm/ttm_pool.c b/drivers/gpu/drm/ttm/ttm_pool.c index 8c762a03ad8a..a264760cb2cd 100644 --- a/drivers/gpu/drm/ttm/ttm_pool.c +++ b/drivers/gpu/drm/ttm/ttm_pool.c @@ -84,7 +84,7 @@ static struct page *ttm_pool_alloc_page(struct ttm_pool *pool, gfp_t gfp_flags, * put_page() on a TTM allocated page is illegal. */ if (order) - gfp_flags |= __GFP_NOMEMALLOC | __GFP_NORETRY | + gfp_flags |= __GFP_NOMEMALLOC | __GFP_NORETRY | __GFP_NOWARN | __GFP_KSWAPD_RECLAIM; if (!pool->use_dma_alloc) { -- 2.30.0

3 2

intel gpu hang solved in fedora
by Muhamad Moghadam 30 Jan '21

30 Jan '21

Hello everybody, After 6 month Intel gpu hang on fedora (drm), with the introduction of 5.11 kernel this problem was solved. Now you can update to 5.11 kernel for Liberation. -- مجله کامیون <http://www.truckdriver.ir/> سلطان جاده Persian Trucking <http://www.truckdriver.ir/> Mag

1 0

[PATCH] drm/lima: fix reference leak in lima_pm_busy
by Qinglang Miao 30 Jan '21

30 Jan '21

pm_runtime_get_sync will increment pm usage counter even it failed. Forgetting to putting operation will result in a reference leak here. A new function pm_runtime_resume_and_get is introduced in [0] to keep usage counter balanced. So We fix the reference leak by replacing it with new funtion. [0] dd8088d5a896 ("PM: runtime: Add pm_runtime_resume_and_get to deal with usage counter") Fixes: 50de2e9ebbc0 ("drm/lima: enable runtime pm") Reported-by: Hulk Robot <hulkci(a)huawei.com> Signed-off-by: Qinglang Miao <miaoqinglang(a)huawei.com> --- drivers/gpu/drm/lima/lima_sched.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/drivers/gpu/drm/lima/lima_sched.c b/drivers/gpu/drm/lima/lima_sched.c index dc6df9e9a..f6e7a88a5 100644 --- a/drivers/gpu/drm/lima/lima_sched.c +++ b/drivers/gpu/drm/lima/lima_sched.c @@ -200,7 +200,7 @@ static int lima_pm_busy(struct lima_device *ldev) int ret; /* resume GPU if it has been suspended by runtime PM */ - ret = pm_runtime_get_sync(ldev->dev); + ret = pm_runtime_resume_and_get(ldev->dev); if (ret < 0) return ret; -- 2.23.0

2 1

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dri-devel January 2021