dri-devel December 2021

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720 discussions

[GIT PULL] drm/tegra: Changes for v5.17-rc1
by Thierry Reding 17 Dec '21

17 Dec '21

Hi Dave, Daniel, The following changes since commit 136057256686de39cc3a07c2e39ef6bc43003ff6: Linux 5.16-rc2 (2021-11-21 13:47:39 -0800) are available in the Git repository at: https://gitlab.freedesktop.org/drm/tegra.git tags/drm/tegra/for-5.17-rc1 for you to fetch changes up to d210919dbdc8a82c676cc3e3c370b1802be63124: drm/tegra: Add back arm_iommu_detach_device() (2021-12-16 14:30:45 +0100) This is unusually big because it contains essentially two cycles' worth of work. I'm still not sure what happened for v5.16-rc1, but the PR was never merged. Fingers crossed that it will work better this time. As mentioned last time already, the userspace for the new NVDEC driver can be found here: https://github.com/cyndis/vaapi-tegra-driver Thanks, Thierry ---------------------------------------------------------------- drm/tegra: Changes for v5.17-rc1 This contains a fairly large rework that makes the buffer objects behave more according to what the DMA-BUF infrastructure expects. A buffer object cache is implemented on top of that to make certain operations such as page-flipping more efficient by avoiding needless map/unmap operations. This in turn is useful to implement asynchronous commits to support legacy cursor updates. Another fairly big addition is the NVDEC driver. This uses the updated UABI introduced in v5.15-rc1 to provide access to the video decode engines found on Tegra210 and later. This also includes some power management improvements that are useful on older devices in particular because they, together with a bunch of other changes across the kernel, allow the system to scale down frequency and voltages when mostly idle and prevent these devices from becoming excessively hot. The remainder of these changes is an assortment of cleanups and minor fixes. ---------------------------------------------------------------- Arnd Bergmann (3): gpu: host1x: select CONFIG_DMA_SHARED_BUFFER drm/tegra: Mark nvdec_writel() as inline drm/tegra: Mark nvdec PM functions as __maybe_unused Dmitry Osipenko (19): soc/tegra: Enable runtime PM during OPP state-syncing soc/tegra: Add devm_tegra_core_dev_init_opp_table_common() drm/tegra: dc: rgb: Move PCLK shifter programming to CRTC drm/tegra: dc: rgb: Allow changing PLLD rate on Tegra30+ drm/tegra: hdmi: Unwind tegra_hdmi_init() errors drm/tegra: hdmi: Register audio CODEC on Tegra20 gpu: host1x: Add initial runtime PM and OPP support gpu: host1x: Add host1x_channel_stop() drm/tegra: submit: Add missing pm_runtime_mark_last_busy() drm/tegra: dc: Support OPP and SoC core voltage scaling drm/tegra: hdmi: Add OPP support drm/tegra: gr2d: Support generic power domain and runtime PM drm/tegra: gr3d: Support generic power domain and runtime PM drm/tegra: vic: Stop channel on suspend drm/tegra: nvdec: Stop channel on suspend drm/tegra: submit: Remove pm_runtime_enabled() checks drm/tegra: Consolidate runtime PM management of older UAPI codepath gpu: host1x: Add back arm_iommu_detach_device() drm/tegra: Add back arm_iommu_detach_device() Mikko Perttunen (3): drm/tegra: Add NVDEC driver drm/tegra: Bump VIC/NVDEC clock rates to Fmax drm/tegra: vic: Use autosuspend Randy Dunlap (1): gpu: host1x: Drop excess kernel-doc entry @key Robin Murphy (2): drm/tegra: vic: Fix DMA API misuse gpu: host1x: Add missing DMA API include Thierry Reding (8): Merge branch 'tegra-for-5.17-soc-opp' of git://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into drm/tegra/for-next drm/tegra: Implement correct DMA-BUF semantics drm/tegra: Implement buffer object cache drm/tegra: Do not reference tegra_plane_funcs directly drm/tegra: Propagate errors from drm_gem_plane_helper_prepare_fb() drm/tegra: Support asynchronous commits for cursor drm/tegra: gr2d: Explicitly control module reset drm/tegra: vic: Handle tegra_drm_alloc() failure Wan Jiabing (1): drm/tegra: Remove duplicate struct declaration drivers/gpu/drm/tegra/Kconfig | 3 + drivers/gpu/drm/tegra/Makefile | 3 +- drivers/gpu/drm/tegra/dc.c | 194 +++++++++++++-- drivers/gpu/drm/tegra/dc.h | 3 + drivers/gpu/drm/tegra/drm.c | 30 ++- drivers/gpu/drm/tegra/drm.h | 1 + drivers/gpu/drm/tegra/gem.c | 171 +++++++++----- drivers/gpu/drm/tegra/gr2d.c | 151 +++++++++++- drivers/gpu/drm/tegra/gr3d.c | 353 +++++++++++++++++++++++----- drivers/gpu/drm/tegra/hdmi.c | 183 +++++++++++++-- drivers/gpu/drm/tegra/hub.h | 1 - drivers/gpu/drm/tegra/nvdec.c | 466 +++++++++++++++++++++++++++++++++++++ drivers/gpu/drm/tegra/plane.c | 65 ++---- drivers/gpu/drm/tegra/plane.h | 2 +- drivers/gpu/drm/tegra/rgb.c | 53 ++++- drivers/gpu/drm/tegra/submit.c | 77 ++++-- drivers/gpu/drm/tegra/uapi.c | 68 ++---- drivers/gpu/drm/tegra/uapi.h | 5 +- drivers/gpu/drm/tegra/vic.c | 61 +++-- drivers/gpu/host1x/Kconfig | 1 + drivers/gpu/host1x/bus.c | 80 ++++++- drivers/gpu/host1x/channel.c | 8 + drivers/gpu/host1x/debug.c | 15 ++ drivers/gpu/host1x/dev.c | 185 ++++++++++++--- drivers/gpu/host1x/dev.h | 5 +- drivers/gpu/host1x/hw/channel_hw.c | 44 ++-- drivers/gpu/host1x/intr.c | 3 - drivers/gpu/host1x/job.c | 160 +++++-------- drivers/gpu/host1x/job.h | 6 +- drivers/gpu/host1x/syncpt.c | 5 +- drivers/soc/tegra/common.c | 25 ++ include/linux/host1x.h | 76 ++++-- include/soc/tegra/common.h | 15 ++ 33 files changed, 2020 insertions(+), 498 deletions(-) create mode 100644 drivers/gpu/drm/tegra/nvdec.c

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[PATCH v6 0/7] drm/sun4i: Add support for dual-link LVDS on the A20
by Maxime Ripard 17 Dec '21

17 Dec '21

Hi, This is another attempt at supporting the LVDS dual-link output on the Allwinner A20. Let me know what you think, Maxime Changes from v5: - Rebased on current next - Enhanced the property binding description Changes from v4: - Rebased on 5.15 Changes from v3: - Reintroduce the endpoint sanity check (and make of_graph_get_port_by_id const in the process) - Make a few doc fixes - Fix device_node leakage - Changed allwinner,lvds-companion to more generic link-companion - Rebased on 5.11 Changes from v2: - Added the DT binding description - Split the patch to enable the A20 - Reworked a bit the error messages Changes from v1: - Reworked the DT bindings - Refactored a bit the panel registration in the tcon code. Maxime Ripard (7): of: Make of_graph_get_port_by_id take a const device_node drm/of: Change the prototype of drm_of_lvds_get_dual_link_pixel_order dt-bindings: display: sun4i: Add LVDS link companion property drm/sun4i: tcon: Refactor the LVDS and panel probing drm/sun4i: tcon: Support the LVDS Dual-Link drm/sun4i: tcon: Enable the A20 dual-link output [DO NOT MERGE] ARM: dts: sun7i: Enable LVDS Dual-Link on the Cubieboard .../display/allwinner,sun4i-a10-tcon.yaml | 6 + arch/arm/boot/dts/sun7i-a20-cubieboard2.dts | 69 ++++++++ drivers/gpu/drm/bridge/ti-sn65dsi83.c | 9 +- drivers/gpu/drm/drm_of.c | 138 +++++++++++---- drivers/gpu/drm/rcar-du/rcar_lvds.c | 8 +- drivers/gpu/drm/sun4i/sun4i_tcon.c | 164 ++++++++++-------- drivers/gpu/drm/sun4i/sun4i_tcon.h | 4 + drivers/of/property.c | 2 +- include/drm/drm_of.h | 16 +- include/linux/of_graph.h | 4 +- 10 files changed, 300 insertions(+), 120 deletions(-) -- 2.33.1

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[PATCH v2 0/7] drm/i915: Asynchronous vma unbinding
by Thomas Hellström 17 Dec '21

17 Dec '21

This patch series introduces infrastructure for asynchronous vma unbinding. The single enabled use-case is initially at buffer object migration where we otherwise sync when unbinding vmas before migration. This in theory allows us to pipeline any number of migrations, but in practice the number is restricted by a sync wait when filling the migration context ring. We might want to look at that moving forward if needed. The other main use-case is to be able to pipeline vma evictions, for example with softpinning where a new vma wants to reuse the vm range of an already active vma. We can't support this just yet because we need dma_resv locking around vma eviction for that, which is under implementation. Patch 1 and 2 are mainly a fix and a subsequent rearrangement of code, Patch 3 is needed for consistent bind locking, Patch 4 introduces vma resource first for error capture purposes. Patch 5 changes the vm backend interface to take vma resources rather than vmas, Patch 6 introduces the async unbinding itself, and finally Patch 7 realizes we have duplicated functionality and removes the vma snapshots. v2: -- Some kernel test robot reports addressed. -- kmem cache for vma resources, See patch 6 -- Various fixes all over the place. See separate commit messages. Thomas Hellström (7): drm/i915: Avoid using the i915_fence_array when collecting dependencies drm/i915: Break out the i915_deps utility drm/i915: Require the vm mutex for i915_vma_bind() drm/i915: Initial introduction of vma resources drm/i915: Use the vma resource as argument for gtt binding / unbinding drm/i915: Use vma resources for async unbinding drm/i915: Use struct vma_resource instead of struct vma_snapshot drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/display/intel_dpt.c | 27 +- .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 67 ++- .../gpu/drm/i915/gem/i915_gem_object_types.h | 27 +- drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 304 ++------------ .../gpu/drm/i915/gem/selftests/huge_pages.c | 37 +- drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 19 +- drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 37 +- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 9 +- drivers/gpu/drm/i915/gt/intel_ggtt.c | 72 ++-- drivers/gpu/drm/i915/gt/intel_gtt.c | 4 + drivers/gpu/drm/i915/gt/intel_gtt.h | 18 +- drivers/gpu/drm/i915/gt/intel_migrate.c | 24 +- drivers/gpu/drm/i915/gt/intel_migrate.h | 9 +- drivers/gpu/drm/i915/gt/intel_ppgtt.c | 22 +- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 13 +- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 2 +- drivers/gpu/drm/i915/i915_debugfs.c | 3 +- drivers/gpu/drm/i915/i915_deps.c | 244 +++++++++++ drivers/gpu/drm/i915/i915_deps.h | 46 +++ drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem.c | 3 + drivers/gpu/drm/i915/i915_gpu_error.c | 87 ++-- drivers/gpu/drm/i915/i915_module.c | 3 + drivers/gpu/drm/i915/i915_request.c | 34 +- drivers/gpu/drm/i915/i915_request.h | 8 +- drivers/gpu/drm/i915/i915_vma.c | 213 +++++++++- drivers/gpu/drm/i915/i915_vma.h | 33 +- drivers/gpu/drm/i915/i915_vma_resource.c | 388 ++++++++++++++++++ drivers/gpu/drm/i915/i915_vma_resource.h | 232 +++++++++++ drivers/gpu/drm/i915/i915_vma_snapshot.c | 134 ------ drivers/gpu/drm/i915/i915_vma_snapshot.h | 112 ----- drivers/gpu/drm/i915/i915_vma_types.h | 5 + drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 159 ++++--- drivers/gpu/drm/i915/selftests/mock_gtt.c | 12 +- 35 files changed, 1571 insertions(+), 840 deletions(-) create mode 100644 drivers/gpu/drm/i915/i915_deps.c create mode 100644 drivers/gpu/drm/i915/i915_deps.h create mode 100644 drivers/gpu/drm/i915/i915_vma_resource.c create mode 100644 drivers/gpu/drm/i915/i915_vma_resource.h delete mode 100644 drivers/gpu/drm/i915/i915_vma_snapshot.c delete mode 100644 drivers/gpu/drm/i915/i915_vma_snapshot.h -- 2.31.1

2 8

PSA: drm-misc-next-fixes is open
by Thomas Zimmermann 17 Dec '21

17 Dec '21

Hi, I'm just letting you know that drm-misc-next-fixes is now open for bug fixes. -rc6 will presumably be tagged this weekend, which means that drm-next is in feature freeze until the next -rc1 comes out. The transition from/to drm-misc-fixes-next often results in patches that are applied to the wrong tree and get stuck there for a long time. Some rules of thumb: * if your patch fixes a bug in drm-next, please put it into drm-misc-next-fixes, * if your patch fixes a bug in upstream, please put it into drm-misc-fixes, * anything else should go into drm-misc-next. The flow chart is at [1]. Best regards Thomas [1] https://drm.pages.freedesktop.org/maintainer-tools/committer-drm-misc.html#… -- Thomas Zimmermann Graphics Driver Developer SUSE Software Solutions Germany GmbH Maxfeldstr. 5, 90409 Nürnberg, Germany (HRB 36809, AG Nürnberg) Geschäftsführer: Ivo Totev

1 0

[PATCH v2 0/8] Host1x context isolation support
by Mikko Perttunen 17 Dec '21

17 Dec '21

Hi all, *** New in v2: Added support for Tegra194 Use standard iommu-map property instead of custom mechanism *** this series adds support for Host1x 'context isolation'. Since when programming engines through Host1x, userspace can program in any addresses it wants, we need some way to isolate the engines' memory spaces. Traditionally this has either been done imperfectly with a single shared IOMMU domain, or by copying and verifying the programming command stream at submit time (Host1x firewall). Since Tegra186 there is a privileged (only usable by kernel) Host1x opcode that allows setting the stream ID sent by the engine to the SMMU. So, by allocating a number of context banks and stream IDs for this purpose, and using this opcode at the beginning of each job, we can implement isolation. Due to the limited number of context banks only each process gets its own context, and not each channel. This feature also allows sharing engines among multiple VMs when used with Host1x's hardware virtualization support - up to 8 VMs can be configured with a subset of allowed stream IDs, enforced at hardware level. To implement this, this series adds a new host1x context bus, which will contain the 'struct device's corresponding to each context bank / stream ID, changes to device tree and SMMU code to allow registering the devices and using the bus, as well as the Host1x stream ID programming code and support in TegraDRM. Device tree bindings are not updated yet pending consensus that the proposed changes make sense. Thanks, Mikko Mikko Perttunen (8): gpu: host1x: Add context bus gpu: host1x: Add context device management code gpu: host1x: Program context stream ID on submission iommu/arm-smmu: Attach to host1x context device bus arm64: tegra: Add Host1x context stream IDs on Tegra186+ drm/tegra: falcon: Set DMACTX field on DMA transactions drm/tegra: vic: Implement get_streamid_offset drm/tegra: Support context isolation arch/arm64/boot/dts/nvidia/tegra186.dtsi | 12 ++ arch/arm64/boot/dts/nvidia/tegra194.dtsi | 12 ++ drivers/gpu/Makefile | 3 +- drivers/gpu/drm/tegra/drm.h | 2 + drivers/gpu/drm/tegra/falcon.c | 8 + drivers/gpu/drm/tegra/falcon.h | 1 + drivers/gpu/drm/tegra/submit.c | 13 ++ drivers/gpu/drm/tegra/uapi.c | 34 ++++- drivers/gpu/drm/tegra/vic.c | 38 +++++ drivers/gpu/host1x/Kconfig | 5 + drivers/gpu/host1x/Makefile | 2 + drivers/gpu/host1x/context.c | 174 ++++++++++++++++++++++ drivers/gpu/host1x/context.h | 27 ++++ drivers/gpu/host1x/context_bus.c | 31 ++++ drivers/gpu/host1x/dev.c | 12 +- drivers/gpu/host1x/dev.h | 2 + drivers/gpu/host1x/hw/channel_hw.c | 52 ++++++- drivers/gpu/host1x/hw/host1x06_hardware.h | 10 ++ drivers/gpu/host1x/hw/host1x07_hardware.h | 10 ++ drivers/iommu/arm/arm-smmu/arm-smmu.c | 13 ++ include/linux/host1x.h | 21 +++ include/linux/host1x_context_bus.h | 15 ++ 22 files changed, 488 insertions(+), 9 deletions(-) create mode 100644 drivers/gpu/host1x/context.c create mode 100644 drivers/gpu/host1x/context.h create mode 100644 drivers/gpu/host1x/context_bus.c create mode 100644 include/linux/host1x_context_bus.h -- 2.32.0

5 16

[PATCH] drm/panfrost: Avoid user size passed to kvmalloc()
by Steven Price 17 Dec '21

17 Dec '21

panfrost_copy_in_sync() takes the number of fences from user space (in_sync_count) and used to kvmalloc() an array to hold that number of fences before processing them. This provides an easy method for user space to trigger the OOM killer (by temporarily allocating large amounts of kernel memory) or hit the WARN_ONCE() added by 7661809d493b ("mm: don't allow oversized kvmalloc() calls"). Since we don't expect there to be a large number of fences we can instead iterate over the fences one-by-one and avoid the temporary allocation altogether. This also makes the code simpler. Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com> Signed-off-by: Steven Price <steven.price(a)arm.com> --- drivers/gpu/drm/panfrost/panfrost_drv.c | 44 ++++++++----------------- 1 file changed, 14 insertions(+), 30 deletions(-) diff --git a/drivers/gpu/drm/panfrost/panfrost_drv.c b/drivers/gpu/drm/panfrost/panfrost_drv.c index 96bb5a465627..12ab55e5782c 100644 --- a/drivers/gpu/drm/panfrost/panfrost_drv.c +++ b/drivers/gpu/drm/panfrost/panfrost_drv.c @@ -186,47 +186,31 @@ panfrost_copy_in_sync(struct drm_device *dev, struct drm_panfrost_submit *args, struct panfrost_job *job) { - u32 *handles; - int ret = 0; - int i, in_fence_count; - - in_fence_count = args->in_sync_count; - - if (!in_fence_count) - return 0; - - handles = kvmalloc_array(in_fence_count, sizeof(u32), GFP_KERNEL); - if (!handles) { - ret = -ENOMEM; - DRM_DEBUG("Failed to allocate incoming syncobj handles\n"); - goto fail; - } + int i; + u32 __user *user_handles = u64_to_user_ptr(args->in_syncs); - if (copy_from_user(handles, - (void __user *)(uintptr_t)args->in_syncs, - in_fence_count * sizeof(u32))) { - ret = -EFAULT; - DRM_DEBUG("Failed to copy in syncobj handles\n"); - goto fail; - } - - for (i = 0; i < in_fence_count; i++) { + for (i = 0; i < args->in_sync_count; i++) { struct dma_fence *fence; + u32 handle; + int ret; + + ret = copy_from_user(&handle, user_handles + i, + sizeof(handle)); + if (ret) + return -EFAULT; - ret = drm_syncobj_find_fence(file_priv, handles[i], 0, 0, + ret = drm_syncobj_find_fence(file_priv, handle, 0, 0, &fence); if (ret) - goto fail; + return ret; ret = drm_sched_job_add_dependency(&job->base, fence); if (ret) - goto fail; + return ret; } -fail: - kvfree(handles); - return ret; + return 0; } static int panfrost_ioctl_submit(struct drm_device *dev, void *data, -- 2.30.2

5 10

[PATCH] drm/i915/guc: Check for wedged before doing stuff
by John.C.Harrison＠Intel.com 17 Dec '21

17 Dec '21

From: John Harrison <John.C.Harrison(a)Intel.com> A fault injection probe test hit a BUG_ON in a GuC error path. It showed that the GuC code could potentially attempt to do many things when the device is actually wedged. So, add a check in to prevent that. Signed-off-by: John Harrison <John.C.Harrison(a)Intel.com> --- drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c index 97311119da6f..88f002c4d41b 100644 --- a/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c +++ b/drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c @@ -1350,7 +1350,8 @@ submission_disabled(struct intel_guc *guc) struct i915_sched_engine * const sched_engine = guc->sched_engine; return unlikely(!sched_engine || - !__tasklet_is_enabled(&sched_engine->tasklet)); + !__tasklet_is_enabled(&sched_engine->tasklet) || + test_bit(I915_WEDGED, &guc_to_gt(guc)->reset.flags)); } static void disable_submission(struct intel_guc *guc) -- 2.25.1

4 4

Re: [PATCH v4 1/2] i915/gvt: Introduce the mmio_info_table.c to support VFIO new mdev API
by Wang, Zhi A 17 Dec '21

17 Dec '21

On 11/30/2021 6:46 PM, Christoph Hellwig wrote: > I still think this goes into the wrong direction. > > Something closer to your first version that also saves away the > gvt->mmio.mmio_attribute flags in the core i915 module, and which > splits the MMIO table into one that contains just the offset, size > and flags (core i915) and one that has the read-only mask and handlers > (gvt) would be much simpler and not create this super-tight coupling > between core i915 and gvt. > > Bonus points for moving your new intel_gvt_hw_state structure out > of struct intel_gvt and into struct i915_virtual_gpu. Hi Christoph: Sorry for the late reply as I am supporting the customers recently. I will refresh this after the christmas. Thanks, Zhi.

1 0

[PATCH v1, 00/12] media: mtk-vcodec: support for MT8192 h264 decoder
by Yunfei Dong 17 Dec '21

17 Dec '21

This series adds support for mt8192 h264 decoder. Firstly, need to refactor power/clk/irq interface for mt8192 is lat and core architecture. Secondly, add new functions to get frame buffer size and resolution according to decoder capability from scp side. Then add callback function to get/put capture buffer in order to enable lat and core decoder in parallel. Then add to support MT21C compressed mode and fix v4l2-compliance fail. Next, extract H264 request api driver to let mt8183 and mt8192 use the common code, at last, add mt8192 h264 slice api driver. Patches 1 refactor power/clk/irq interface. Patches 2~4 get frame buffer size and resolution according to decoder capability. Patches 5~6 enable lat and core decode in parallel. Patch 7~10 Add to support MT21C compressed mode and fix v4l2-compliance fail. Patch 11~12 extract h264 driver and add mt8192 h264 slice api driver ---- Dependents on "Support multi hardware decode using of_platform_populate"[1]. This patches are the second part used to add mt8192 h264 decoder. And the base part is [1]. [1]https://patchwork.linuxtv.org/project/linux-media/cover/20211215061552.85… ---- Yunfei Dong (12): media: mtk-vcodec: Add vdec enable/disable hardware helpers media: mtk-vcodec: Using firmware type to separate different firmware architecture media: mtk-vcodec: get frame buffer size from scp media: mtk-vcodec: Read max resolution from dec_capability media: mtk-vcodec: Call v4l2_m2m_set_dst_buffered() set capture buffer buffered media: mtk-vcodec: Refactor get and put capture buffer flow media: mtk-vcodec: Refactor supported vdec formats and framesizes media: mtk-vcodec: Add format to support MT21C media: mtk-vcodec: disable vp8 4K capability media: mtk-vcodec: Fix v4l2-compliance fail media: mtk-vcodec: Extract H264 common code media: mtk-vcodec: Add h264 slice api driver for mt8192 drivers/media/platform/mtk-vcodec/Makefile | 2 + .../platform/mtk-vcodec/mtk_vcodec_dec.c | 49 +- .../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 5 - .../platform/mtk-vcodec/mtk_vcodec_dec_pm.c | 162 +++-- .../platform/mtk-vcodec/mtk_vcodec_dec_pm.h | 6 +- .../mtk-vcodec/mtk_vcodec_dec_stateful.c | 14 +- .../mtk-vcodec/mtk_vcodec_dec_stateless.c | 245 +++++-- .../platform/mtk-vcodec/mtk_vcodec_drv.h | 27 +- .../media/platform/mtk-vcodec/mtk_vcodec_fw.c | 6 + .../media/platform/mtk-vcodec/mtk_vcodec_fw.h | 1 + .../mtk-vcodec/vdec/vdec_h264_req_common.c | 303 +++++++++ .../mtk-vcodec/vdec/vdec_h264_req_common.h | 247 +++++++ .../mtk-vcodec/vdec/vdec_h264_req_if.c | 402 +----------- .../mtk-vcodec/vdec/vdec_h264_req_lat_if.c | 620 ++++++++++++++++++ .../media/platform/mtk-vcodec/vdec_drv_if.c | 28 +- .../media/platform/mtk-vcodec/vdec_drv_if.h | 1 + .../media/platform/mtk-vcodec/vdec_ipi_msg.h | 36 + .../platform/mtk-vcodec/vdec_msg_queue.c | 2 + .../media/platform/mtk-vcodec/vdec_vpu_if.c | 55 +- .../media/platform/mtk-vcodec/vdec_vpu_if.h | 15 + include/linux/remoteproc/mtk_scp.h | 2 + 21 files changed, 1672 insertions(+), 556 deletions(-) create mode 100644 drivers/media/platform/mtk-vcodec/vdec/vdec_h264_req_common.c create mode 100644 drivers/media/platform/mtk-vcodec/vdec/vdec_h264_req_common.h create mode 100644 drivers/media/platform/mtk-vcodec/vdec/vdec_h264_req_lat_if.c -- 2.25.1

3 14

[PATCH] drm/amdgpu: potential dereference of null pointer
by Jiasheng Jiang 17 Dec '21

17 Dec '21

The return value of dma_alloc_coherent() needs to be checked. To avoid use of null pointer in memcpy_toio() in case of the failure of alloc. Fixes: 57430471e2fa ("drm/amdgpu: Add support for USBC PD FW download") Signed-off-by: Jiasheng Jiang <jiasheng(a)iscas.ac.cn> --- drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c index a09483beb968..613e25bf87e5 100644 --- a/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c +++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_psp.c @@ -3034,6 +3034,10 @@ static ssize_t psp_usbc_pd_fw_sysfs_write(struct device *dev, /* We need contiguous physical mem to place the FW for psp to access */ cpu_addr = dma_alloc_coherent(adev->dev, usbc_pd_fw->size, &dma_addr, GFP_KERNEL); + if (!cpu_addr) { + ret = -ENOMEM; + goto rel_buf; + } ret = dma_mapping_error(adev->dev, dma_addr); if (ret) -- 2.25.1

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dri-devel December 2021