dri-devel December 2021

dri-devel@lists.freedesktop.org

310 participants
720 discussions

[PATCH 0/7] drm/i915: Asynchronous vma unbinding
by Thomas Hellström 16 Dec '21

16 Dec '21

This patch series introduces infrastructure for asynchronous vma unbinding. The single enabled use-case is initially at buffer object migration where we otherwise sync when unbinding vmas before migration. This in theory allows us to pipeline any number of migrations, but in practice the number is restricted by a sync wait when filling the migration context ring. We might want to look at that moving forward if needed. The other main use-case is to be able to pipeline vma evictions, for example with softpinning where a new vma wants to reuse the vm range of an already active vma. We can't support this just yet because we need dma_resv locking around vma eviction for that, which is under implementation. Patch 1 and 2 are mainly a fix and a subsequent rearrangement of code, Patch 3 is needed for consistent bind locking, Patch 4 introduces vma resource first for error capture purposes. Patch 5 changes the vm backend interface to take vma resources rather than vmas, Patch 6 introduces the async unbinding itself, and finally Patch 7 realizes we have duplicated functionality and removes the vma snapshots. Thomas Hellström (7): drm/i915: Avoid using the i915_fence_array when collecting dependencies drm/i915: Break out the i915_deps utility drm/i915: Require the vm mutex for i915_vma_bind() drm/i915: Initial introduction of vma resources drm/i915: Use the vma resource as argument for gtt binding / unbinding drm/i915: Use vma resources for async unbinding drm/i915: Use struct vma_resource instead of struct vma_snapshot drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/display/intel_dpt.c | 27 +- .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 67 +++- .../gpu/drm/i915/gem/i915_gem_object_types.h | 27 +- drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 303 ++------------- .../gpu/drm/i915/gem/selftests/huge_pages.c | 37 +- drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 19 +- drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 37 +- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 9 +- drivers/gpu/drm/i915/gt/intel_ggtt.c | 70 ++-- drivers/gpu/drm/i915/gt/intel_gtt.c | 4 + drivers/gpu/drm/i915/gt/intel_gtt.h | 18 +- drivers/gpu/drm/i915/gt/intel_migrate.c | 24 +- drivers/gpu/drm/i915/gt/intel_migrate.h | 9 +- drivers/gpu/drm/i915/gt/intel_ppgtt.c | 22 +- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.c | 13 +- drivers/gpu/drm/i915/gt/uc/intel_uc_fw.h | 2 +- drivers/gpu/drm/i915/i915_debugfs.c | 3 +- drivers/gpu/drm/i915/i915_deps.c | 249 ++++++++++++ drivers/gpu/drm/i915/i915_deps.h | 46 +++ drivers/gpu/drm/i915/i915_drv.h | 1 + drivers/gpu/drm/i915/i915_gem.c | 3 + drivers/gpu/drm/i915/i915_gpu_error.c | 87 ++--- drivers/gpu/drm/i915/i915_request.c | 34 +- drivers/gpu/drm/i915/i915_request.h | 8 +- drivers/gpu/drm/i915/i915_vma.c | 207 +++++++++- drivers/gpu/drm/i915/i915_vma.h | 33 +- drivers/gpu/drm/i915/i915_vma_resource.c | 357 ++++++++++++++++++ drivers/gpu/drm/i915/i915_vma_resource.h | 223 +++++++++++ drivers/gpu/drm/i915/i915_vma_snapshot.c | 134 ------- drivers/gpu/drm/i915/i915_vma_snapshot.h | 112 ------ drivers/gpu/drm/i915/i915_vma_types.h | 5 + drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 159 +++++--- drivers/gpu/drm/i915/selftests/mock_gtt.c | 12 +- 34 files changed, 1528 insertions(+), 836 deletions(-) create mode 100644 drivers/gpu/drm/i915/i915_deps.c create mode 100644 drivers/gpu/drm/i915/i915_deps.h create mode 100644 drivers/gpu/drm/i915/i915_vma_resource.c create mode 100644 drivers/gpu/drm/i915/i915_vma_resource.h delete mode 100644 drivers/gpu/drm/i915/i915_vma_snapshot.c delete mode 100644 drivers/gpu/drm/i915/i915_vma_snapshot.h -- 2.31.1

3 14

[PATCH v2 0/3] ast: Fix I2C corner cases wrt init/cleanup
by Thomas Zimmermann 16 Dec '21

16 Dec '21

The VGA connector in ast is supposed to work without I2C. Currently, this isn't implemented correctly in several places. Fix this. Also add managed cleanup of the I2C code and move it into separate source file. Tested on AST2100 hardware. v2: * init edid to NULL to avoid uninitialized read * drop test for drm_connector_init() for now * move I2C code into separate source file Thomas Zimmermann (3): drm/ast: Handle failed I2C initialization gracefully drm/ast: Convert I2C code to managed cleanup drm/ast: Move I2C code into separate source file drivers/gpu/drm/ast/Makefile | 2 +- drivers/gpu/drm/ast/ast_drv.h | 3 + drivers/gpu/drm/ast/ast_i2c.c | 152 +++++++++++++++++++++++++++++++++ drivers/gpu/drm/ast/ast_mode.c | 151 +++----------------------------- 4 files changed, 167 insertions(+), 141 deletions(-) create mode 100644 drivers/gpu/drm/ast/ast_i2c.c base-commit: 909bf926eaf382123d9b215871143d9e3cf44aa3 -- 2.34.1

1 4

[PATCH v3] drm/tilcdc: add const to of_device_id
by Xiang wangx 16 Dec '21

16 Dec '21

struct of_device_id should normally be const. Signed-off-by: Xiang wangx <wangxiang(a)cdjrlc.com> --- Changes since v1 * add const in line 63 Changes since v2 * removed line 63 drivers/gpu/drm/tilcdc/tilcdc_drv.c | 4 +--- 1 file changed, 1 insertion(+), 3 deletions(-) diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c index 3ddb7c710a3d..cc567c87057d 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c @@ -60,8 +60,6 @@ void tilcdc_module_cleanup(struct tilcdc_module *mod) list_del(&mod->list); } -static struct of_device_id tilcdc_of_match[]; - static int tilcdc_atomic_check(struct drm_device *dev, struct drm_atomic_state *state) { @@ -587,7 +585,7 @@ static int tilcdc_pdev_remove(struct platform_device *pdev) return 0; } -static struct of_device_id tilcdc_of_match[] = { +static const struct of_device_id tilcdc_of_match[] = { { .compatible = "ti,am33xx-tilcdc", }, { .compatible = "ti,da850-tilcdc", }, { }, -- 2.34.1

2 1

[PATCH v2] drm/tilcdc: add const to of_device_id
by Xiang wangx 16 Dec '21

16 Dec '21

struct of_device_id should normally be const. Signed-off-by: Xiang wangx <wangxiang(a)cdjrlc.com> --- Changes since v1 * add const in line 63 drivers/gpu/drm/tilcdc/tilcdc_drv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/tilcdc/tilcdc_drv.c b/drivers/gpu/drm/tilcdc/tilcdc_drv.c index 3ddb7c710a3d..7c36ecd82ebc 100644 --- a/drivers/gpu/drm/tilcdc/tilcdc_drv.c +++ b/drivers/gpu/drm/tilcdc/tilcdc_drv.c @@ -60,7 +60,7 @@ void tilcdc_module_cleanup(struct tilcdc_module *mod) list_del(&mod->list); } -static struct of_device_id tilcdc_of_match[]; +static const struct of_device_id tilcdc_of_match[]; static int tilcdc_atomic_check(struct drm_device *dev, struct drm_atomic_state *state) @@ -587,7 +587,7 @@ static int tilcdc_pdev_remove(struct platform_device *pdev) return 0; } -static struct of_device_id tilcdc_of_match[] = { +static const struct of_device_id tilcdc_of_match[] = { { .compatible = "ti,am33xx-tilcdc", }, { .compatible = "ti,da850-tilcdc", }, { }, -- 2.34.1

3 2

[PATCH v3 0/3] drm/simpledrm: Apple M1 / DT platform support fixes
by Hector Martin 16 Dec '21

16 Dec '21

Hi DRM folks, This short series makes simpledrm work on Apple M1 (including Pro/Max) platforms the way simplefb already does, by adding XRGB2101010 support and making it bind to framebuffers in /chosen the same way simplefb does. This avoids breaking the bootloader-provided framebuffer console when simpledrm is selected to replace simplefb, as these FBs always seem to be 10-bit (at least when a real screen is attached). Changes since v2: - Made 10-bit conversion code fill the LSBs - Added ARGB2101010 to supported formats list - Simplified OF core code per review feedback Hector Martin (3): of: Move simple-framebuffer device handling from simplefb to of drm/format-helper: Add drm_fb_xrgb8888_to_xrgb2101010_toio() drm/simpledrm: Add [AX]RGB2101010 formats drivers/gpu/drm/drm_format_helper.c | 64 +++++++++++++++++++++++++++++ drivers/gpu/drm/tiny/simpledrm.c | 4 +- drivers/of/platform.c | 4 ++ drivers/video/fbdev/simplefb.c | 21 +--------- include/drm/drm_format_helper.h | 3 ++ 5 files changed, 74 insertions(+), 22 deletions(-) -- 2.33.0

4 15

[PATCH] drm/vmwgfx: Fix possible usage of an uninitialized variable
by Zack Rusin 16 Dec '21

16 Dec '21

From: Zack Rusin <zackr(a)vmware.com> vmw_user_bo_lookup can fail to lookup user buffers, especially because the buffer handles come from the userspace. The return value has to be checked before the buffers are put back. This was spotted by Dan's Smatch statick checker: drivers/gpu/drm/vmwgfx/vmwgfx_bo.c:574 vmw_user_bo_synccpu_release() error: uninitialized symbol 'vmw_bo'. Signed-off-by: Zack Rusin <zackr(a)vmware.com> Reported-by: Dan Carpenter <dan.carpenter(a)oracle.com> Fixes: 8afa13a0583f ("drm/vmwgfx: Implement DRIVER_GEM") --- drivers/gpu/drm/vmwgfx/vmwgfx_bo.c | 8 +++++--- 1 file changed, 5 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c b/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c index 15fead85450c..31aecc46624b 100644 --- a/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c +++ b/drivers/gpu/drm/vmwgfx/vmwgfx_bo.c @@ -568,10 +568,12 @@ static int vmw_user_bo_synccpu_release(struct drm_file *filp, struct vmw_buffer_object *vmw_bo; int ret = vmw_user_bo_lookup(filp, handle, &vmw_bo); - if (!(flags & drm_vmw_synccpu_allow_cs)) { - atomic_dec(&vmw_bo->cpu_writers); + if (!ret) { + if (!(flags & drm_vmw_synccpu_allow_cs)) { + atomic_dec(&vmw_bo->cpu_writers); + } + ttm_bo_put(&vmw_bo->base); } - ttm_bo_put(&vmw_bo->base); return ret; } -- 2.32.0

2 1

[PATCH v16, 00/19] Support multi hardware decode using of_platform_populate
by Yunfei Dong 16 Dec '21

16 Dec '21

This series adds support for multi hardware decode into mtk-vcodec, by first adding use of_platform_populate to manage each hardware information: interrupt, clock, register bases and power. Secondly add core work queue to deal with core hardware message, at the same time, add msg queue for different hardware share messages. Lastly, the architecture of different specs are not the same, using specs type to separate them. This series has been tested with both MT8183 and MT8173. Decoding was working for both chips. Patches 1~3 rewrite get register bases and power on/off interface. Patches 4 export decoder pm interfaces. Patches 5 add to support 8192. Patch 6 support multi hardware. Patch 7 separate video encoder and decoder document Patch 8-17 add interfaces to support core hardware. Patch 18-19 remove mtk_vcodec_release_dec/enc_pm interfaces. --- changes compared with v15: - add Reviewed-by for patch 10. changes compared with v14: - rebase to latest media stage. changes compared with v13: - change some function position in case of ko dependency for patch 15. - add reviewed-by for patch 06/13/15. changes compared with v12: - fix comments from rob for patch 15. - fix comments from steve for 06 and 13. changes compared with v11: - fix comments from AngeloGioacchino for patch 09~11/19. - fix comments from steve for patch 03/19. changes compared with v10: - fix comments from tzung-bi for patch 06/19. - add more detail information for hardware block diagram 15/19 changes compared with v9: - need not to build ko, just export pm interfaces for patch 04/19. - fix comments for patch 06/19 changes compared with v8: - add new patch 18~19 to remove mtk_vcodec_release_de/enc_pm interfaces. - fix spelling mistakes for patch 17/19 - fix yaml comments for patch 15/19 Changes compared with v7: - add new patch 4 to build decoder pm file as module - add new patch 5 to support 8192 - fix comments for patch 6/17 - change some logic for using work queue instead of create thread for core hardware decode for patch 10/17 - using work queue for hardware decode instead of create thread for patch 13/17 - add returen value for patch 14/17 - fix yaml check fail 15/17 Changes compared with v6: - Use of_platform_populate to manage multi hardware, not component framework for patch 4/15 - Re-write dtsi document for hardware architecture changed for patch 13/15 -The dtsi will write like below in patch 13/15: vcodec_dec: vcodec_dec@16000000 { compatible = "mediatek,mt8192-vcodec-dec"; #address-cells = <2>; #size-cells = <2>; ranges; reg = <0 0x16000000 0 0x1000>; /* VDEC_SYS */ mediatek,scp = <&scp>; iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>; dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>; vcodec_lat { compatible = "mediatek,mtk-vcodec-lat"; reg = <0 0x16010000 0 0x800>; /* VDEC_MISC */ reg-name = "reg-misc"; interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 0>; iommus = <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD2_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_AVC_MV_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_PRED_RD_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_TILE_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_WDMA_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_RG_CTRL_DMA_EXT>, <&iommu0 M4U_PORT_L5_VDEC_UFO_ENC_EXT>; clocks = <&topckgen CLK_TOP_VDEC_SEL>, <&vdecsys_soc CLK_VDEC_SOC_VDEC>, <&vdecsys_soc CLK_VDEC_SOC_LAT>, <&vdecsys_soc CLK_VDEC_SOC_LARB1>, <&topckgen CLK_TOP_MAINPLL_D4>; clock-names = "vdec-sel", "vdec-soc-vdec", "vdec-soc-lat", "vdec-vdec", "vdec-top"; assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D4>; power-domains = <&spm MT8192_POWER_DOMAIN_VDEC>; }; vcodec_core { compatible = "mediatek,mtk-vcodec-core"; reg = <0 0x16025000 0 0x1000>; /* VDEC_CORE_MISC */ reg-names = "reg-misc"; interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 0>; iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>, <&iommu0 M4U_PORT_L4_VDEC_UFO_EXT>, <&iommu0 M4U_PORT_L4_VDEC_PP_EXT>, <&iommu0 M4U_PORT_L4_VDEC_PRED_RD_EXT>, <&iommu0 M4U_PORT_L4_VDEC_PRED_WR_EXT>, <&iommu0 M4U_PORT_L4_VDEC_PPWRAP_EXT>, <&iommu0 M4U_PORT_L4_VDEC_TILE_EXT>, <&iommu0 M4U_PORT_L4_VDEC_VLD_EXT>, <&iommu0 M4U_PORT_L4_VDEC_VLD2_EXT>, <&iommu0 M4U_PORT_L4_VDEC_AVC_MV_EXT>, <&iommu0 M4U_PORT_L4_VDEC_RG_CTRL_DMA_EXT>; clocks = <&topckgen CLK_TOP_VDEC_SEL>, <&vdecsys CLK_VDEC_VDEC>, <&vdecsys CLK_VDEC_LAT>, <&vdecsys CLK_VDEC_LARB1>, <&topckgen CLK_TOP_MAINPLL_D4>; clock-names = "vdec-sel", "vdec-soc-vdec", "vdec-soc-lat", "vdec-vdec", "vdec-top"; assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D4>; power-domains = <&spm MT8192_POWER_DOMAIN_VDEC2>; }; }; Changes compared with v5: - Add decoder hardware block diagram for patch 13/15 Changes compared with v4: - Fix comments for patch 4/15 >> + if (dev->is_comp_supported) { >> + ret = mtk_vcodec_init_master(dev); >> + if (ret < 0) >> + goto err_component_match; >> + } else { >> + platform_set_drvdata(pdev, dev); >> + } Fix platform_set_drvdata. - Fix build error for patch 9/15 - Add depend patch in case of error header file for patch 13/15 Changes compared with v3: - Fix return value for patch 1/15 - Fix comments for patch 4/15 > Looking up "mediatek,mtk-vcodec-core" to determine if it uses component framwork sounds like... Add prameter in pdata, for all platform will use compoent after mt8183 >> + if (dev->is_comp_supported) { >> + ret = mtk_vcodec_init_master(dev); >> + if (ret < 0) >> + goto err_component_match; >> + } else { >> + platform_set_drvdata(pdev, dev); >> + } > + Has asked the same question in [1]. Why it removes the > +platform_set_drvdata() above? mtk_vcodec_init_master() also calls platform_set_drvdata(). Must call component_master_add_with_match after platform_set_drvdata for component architecture. - Fix yaml files check fail for patch 5/15 - Fix yaml file check fail for patch 14/15 Changes compared with v1: - Fix many comments for patch 3/14 - Remove unnecessary code for patch 4/14 - Using enum mtk_vdec_hw_count instead of magic numbers for patch 6/14 - Reconstructed get/put lat buffer for lat and core hardware for patch 7/14 - Using yaml format to instead of txt file for patch 12/14 Yunfei Dong (19): media: mtk-vcodec: Get numbers of register bases from DT media: mtk-vcodec: Align vcodec wake up interrupt interface media: mtk-vcodec: Refactor vcodec pm interface media: mtk-vcodec: export decoder pm functions media: mtk-vcodec: Support MT8192 media: mtk-vcodec: Add to support multi hardware decode dt-bindings: media: mtk-vcodec: Separate video encoder and decoder dt-bindings media: mtk-vcodec: Use pure single core for MT8183 media: mtk-vcodec: Add irq interface for multi hardware media: mtk-vcodec: Add msg queue feature for lat and core architecture media: mtk-vcodec: Generalize power and clock on/off interfaces media: mtk-vcodec: Add new interface to lock different hardware media: mtk-vcodec: Add work queue for core hardware decode media: mtk-vcodec: Support 34bits dma address for vdec dt-bindings: media: mtk-vcodec: Adds decoder dt-bindings for mt8192 media: mtk-vcodec: Add core dec and dec end ipi msg media: mtk-vcodec: Use codec type to separate different hardware media: mtk-vcodec: Remove mtk_vcodec_release_dec_pm media: mtk-vcodec: Remove mtk_vcodec_release_enc_pm .../media/mediatek,vcodec-decoder.yaml | 176 +++++++++++ .../media/mediatek,vcodec-encoder.yaml | 187 ++++++++++++ .../media/mediatek,vcodec-subdev-decoder.yaml | 265 ++++++++++++++++ .../bindings/media/mediatek-vcodec.txt | 131 -------- drivers/media/platform/mtk-vcodec/Makefile | 6 +- .../platform/mtk-vcodec/mtk_vcodec_dec.c | 4 +- .../platform/mtk-vcodec/mtk_vcodec_dec.h | 1 + .../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 177 ++++++++--- .../platform/mtk-vcodec/mtk_vcodec_dec_hw.c | 201 ++++++++++++ .../platform/mtk-vcodec/mtk_vcodec_dec_hw.h | 53 ++++ .../platform/mtk-vcodec/mtk_vcodec_dec_pm.c | 104 +++++-- .../platform/mtk-vcodec/mtk_vcodec_dec_pm.h | 12 +- .../mtk-vcodec/mtk_vcodec_dec_stateful.c | 2 + .../mtk-vcodec/mtk_vcodec_dec_stateless.c | 21 ++ .../platform/mtk-vcodec/mtk_vcodec_drv.h | 73 ++++- .../platform/mtk-vcodec/mtk_vcodec_enc_drv.c | 21 +- .../platform/mtk-vcodec/mtk_vcodec_enc_pm.c | 10 +- .../platform/mtk-vcodec/mtk_vcodec_enc_pm.h | 3 +- .../platform/mtk-vcodec/mtk_vcodec_intr.c | 27 +- .../platform/mtk-vcodec/mtk_vcodec_intr.h | 4 +- .../platform/mtk-vcodec/mtk_vcodec_util.c | 59 +++- .../platform/mtk-vcodec/mtk_vcodec_util.h | 8 +- .../platform/mtk-vcodec/vdec/vdec_h264_if.c | 2 +- .../mtk-vcodec/vdec/vdec_h264_req_if.c | 2 +- .../platform/mtk-vcodec/vdec/vdec_vp8_if.c | 2 +- .../platform/mtk-vcodec/vdec/vdec_vp9_if.c | 2 +- .../media/platform/mtk-vcodec/vdec_drv_if.c | 21 +- .../media/platform/mtk-vcodec/vdec_ipi_msg.h | 16 +- .../platform/mtk-vcodec/vdec_msg_queue.c | 289 ++++++++++++++++++ .../platform/mtk-vcodec/vdec_msg_queue.h | 143 +++++++++ .../media/platform/mtk-vcodec/vdec_vpu_if.c | 46 ++- .../media/platform/mtk-vcodec/vdec_vpu_if.h | 22 ++ .../platform/mtk-vcodec/venc/venc_h264_if.c | 2 +- .../platform/mtk-vcodec/venc/venc_vp8_if.c | 2 +- 34 files changed, 1800 insertions(+), 294 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml create mode 100644 Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml create mode 100644 Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml delete mode 100644 Documentation/devicetree/bindings/media/mediatek-vcodec.txt create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_hw.c create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_hw.h create mode 100644 drivers/media/platform/mtk-vcodec/vdec_msg_queue.c create mode 100644 drivers/media/platform/mtk-vcodec/vdec_msg_queue.h -- 2.25.1

1 19

IMX6Q DRM - Framebuffer update rate with LVDS
by Chris Pringle 16 Dec '21

16 Dec '21

Hi, I'm looking for some advice/guidance on an issue I've run into with the IMX DRM implementation with LVDS. I'm using an imx6q with an 1080p LVDS display on kernel 5.10.73-rt. When running Qt applications (EGLFS) with this platform, I've run into a strange issue where the framebuffer flip rate (as observed in libdrm) seems to be fixed at either ~14fps or ~28fps. This changes from ~14fps to ~28fps when I increase the pixel clock rate for the display above ~75.5Mhz. Our render times are well below 35mS - usually around 28-30mS. With a pixel clock of 74Mhz, the frame buffer refreshes every 70mS, blocking the app waiting for the next page flip. Increasing the pixel clock to 75.5Mhz causes the frame buffer to flip every 35mS. Increasing the pixel clock further to around 140MHz makes no difference - the frame buffer still flips every 35mS. It appears as if the clock governing the frame buffer is not scaling with the display pixel clock and is running asynchronously - I'm unclear if this is by design or if this is down to platform misconfiguration. The pixel clock for the LVDS display is set in the DTS file and is being correctly picked up - I can see the display refresh rate reflected in the Qt library logs and the pixel clock rate reflected in the debug kernel logs for the imx-ipuv3 driver. Does anyone have any thoughts on what might be causing this behaviour? I'd like to understand why the framebuffer refresh rate is not changing proportionally with the pixel clock rate, and why the duration between flips suddenly jumps from 35mS to 70mS when the pixel clock drops below ~75.5Mhz. Thanks, Chris

2 2

[PATCH v15, 00/19] Support multi hardware decode using of_platform_populate
by Yunfei Dong 16 Dec '21

16 Dec '21

This series adds support for multi hardware decode into mtk-vcodec, by first adding use of_platform_populate to manage each hardware information: interrupt, clock, register bases and power. Secondly add core work queue to deal with core hardware message, at the same time, add msg queue for different hardware share messages. Lastly, the architecture of different specs are not the same, using specs type to separate them. This series has been tested with both MT8183 and MT8173. Decoding was working for both chips. Patches 1~3 rewrite get register bases and power on/off interface. Patches 4 export decoder pm interfaces. Patches 5 add to support 8192. Patch 6 support multi hardware. Patch 7 separate video encoder and decoder document Patch 8-17 add interfaces to support core hardware. Patch 18-19 remove mtk_vcodec_release_dec/enc_pm interfaces. --- changes compared with v13: - rebase to latest media stage. changes compared with v13: - change some function position in case of ko dependency for patch 15. - add reviewed-by for patch 06/13/15. changes compared with v12: - fix comments from rob for patch 15. - fix comments from steve for 06 and 13. changes compared with v11: - fix comments from AngeloGioacchino for patch 09~11/19. - fix comments from steve for patch 03/19. changes compared with v10: - fix comments from tzung-bi for patch 06/19. - add more detail information for hardware block diagram 15/19 changes compared with v9: - need not to build ko, just export pm interfaces for patch 04/19. - fix comments for patch 06/19 changes compared with v8: - add new patch 18~19 to remove mtk_vcodec_release_de/enc_pm interfaces. - fix spelling mistakes for patch 17/19 - fix yaml comments for patch 15/19 Changes compared with v7: - add new patch 4 to build decoder pm file as module - add new patch 5 to support 8192 - fix comments for patch 6/17 - change some logic for using work queue instead of create thread for core hardware decode for patch 10/17 - using work queue for hardware decode instead of create thread for patch 13/17 - add returen value for patch 14/17 - fix yaml check fail 15/17 Changes compared with v6: - Use of_platform_populate to manage multi hardware, not component framework for patch 4/15 - Re-write dtsi document for hardware architecture changed for patch 13/15 -The dtsi will write like below in patch 13/15: vcodec_dec: vcodec_dec@16000000 { compatible = "mediatek,mt8192-vcodec-dec"; #address-cells = <2>; #size-cells = <2>; ranges; reg = <0 0x16000000 0 0x1000>; /* VDEC_SYS */ mediatek,scp = <&scp>; iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>; dma-ranges = <0x1 0x0 0x0 0x40000000 0x0 0xfff00000>; vcodec_lat { compatible = "mediatek,mtk-vcodec-lat"; reg = <0 0x16010000 0 0x800>; /* VDEC_MISC */ reg-name = "reg-misc"; interrupts = <GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH 0>; iommus = <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_VLD2_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_AVC_MV_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_PRED_RD_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_TILE_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_WDMA_EXT>, <&iommu0 M4U_PORT_L5_VDEC_LAT0_RG_CTRL_DMA_EXT>, <&iommu0 M4U_PORT_L5_VDEC_UFO_ENC_EXT>; clocks = <&topckgen CLK_TOP_VDEC_SEL>, <&vdecsys_soc CLK_VDEC_SOC_VDEC>, <&vdecsys_soc CLK_VDEC_SOC_LAT>, <&vdecsys_soc CLK_VDEC_SOC_LARB1>, <&topckgen CLK_TOP_MAINPLL_D4>; clock-names = "vdec-sel", "vdec-soc-vdec", "vdec-soc-lat", "vdec-vdec", "vdec-top"; assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D4>; power-domains = <&spm MT8192_POWER_DOMAIN_VDEC>; }; vcodec_core { compatible = "mediatek,mtk-vcodec-core"; reg = <0 0x16025000 0 0x1000>; /* VDEC_CORE_MISC */ reg-names = "reg-misc"; interrupts = <GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH 0>; iommus = <&iommu0 M4U_PORT_L4_VDEC_MC_EXT>, <&iommu0 M4U_PORT_L4_VDEC_UFO_EXT>, <&iommu0 M4U_PORT_L4_VDEC_PP_EXT>, <&iommu0 M4U_PORT_L4_VDEC_PRED_RD_EXT>, <&iommu0 M4U_PORT_L4_VDEC_PRED_WR_EXT>, <&iommu0 M4U_PORT_L4_VDEC_PPWRAP_EXT>, <&iommu0 M4U_PORT_L4_VDEC_TILE_EXT>, <&iommu0 M4U_PORT_L4_VDEC_VLD_EXT>, <&iommu0 M4U_PORT_L4_VDEC_VLD2_EXT>, <&iommu0 M4U_PORT_L4_VDEC_AVC_MV_EXT>, <&iommu0 M4U_PORT_L4_VDEC_RG_CTRL_DMA_EXT>; clocks = <&topckgen CLK_TOP_VDEC_SEL>, <&vdecsys CLK_VDEC_VDEC>, <&vdecsys CLK_VDEC_LAT>, <&vdecsys CLK_VDEC_LARB1>, <&topckgen CLK_TOP_MAINPLL_D4>; clock-names = "vdec-sel", "vdec-soc-vdec", "vdec-soc-lat", "vdec-vdec", "vdec-top"; assigned-clocks = <&topckgen CLK_TOP_VDEC_SEL>; assigned-clock-parents = <&topckgen CLK_TOP_MAINPLL_D4>; power-domains = <&spm MT8192_POWER_DOMAIN_VDEC2>; }; }; Changes compared with v5: - Add decoder hardware block diagram for patch 13/15 Changes compared with v4: - Fix comments for patch 4/15 >> + if (dev->is_comp_supported) { >> + ret = mtk_vcodec_init_master(dev); >> + if (ret < 0) >> + goto err_component_match; >> + } else { >> + platform_set_drvdata(pdev, dev); >> + } Fix platform_set_drvdata. - Fix build error for patch 9/15 - Add depend patch in case of error header file for patch 13/15 Changes compared with v3: - Fix return value for patch 1/15 - Fix comments for patch 4/15 > Looking up "mediatek,mtk-vcodec-core" to determine if it uses component framwork sounds like... Add prameter in pdata, for all platform will use compoent after mt8183 >> + if (dev->is_comp_supported) { >> + ret = mtk_vcodec_init_master(dev); >> + if (ret < 0) >> + goto err_component_match; >> + } else { >> + platform_set_drvdata(pdev, dev); >> + } > + Has asked the same question in [1]. Why it removes the > +platform_set_drvdata() above? mtk_vcodec_init_master() also calls platform_set_drvdata(). Must call component_master_add_with_match after platform_set_drvdata for component architecture. - Fix yaml files check fail for patch 5/15 - Fix yaml file check fail for patch 14/15 Changes compared with v1: - Fix many comments for patch 3/14 - Remove unnecessary code for patch 4/14 - Using enum mtk_vdec_hw_count instead of magic numbers for patch 6/14 - Reconstructed get/put lat buffer for lat and core hardware for patch 7/14 - Using yaml format to instead of txt file for patch 12/14 Yunfei Dong (19): media: mtk-vcodec: Get numbers of register bases from DT media: mtk-vcodec: Align vcodec wake up interrupt interface media: mtk-vcodec: Refactor vcodec pm interface media: mtk-vcodec: export decoder pm functions media: mtk-vcodec: Support MT8192 media: mtk-vcodec: Add to support multi hardware decode dt-bindings: media: mtk-vcodec: Separate video encoder and decoder dt-bindings media: mtk-vcodec: Use pure single core for MT8183 media: mtk-vcodec: Add irq interface for multi hardware media: mtk-vcodec: Add msg queue feature for lat and core architecture media: mtk-vcodec: Generalize power and clock on/off interfaces media: mtk-vcodec: Add new interface to lock different hardware media: mtk-vcodec: Add work queue for core hardware decode media: mtk-vcodec: Support 34bits dma address for vdec dt-bindings: media: mtk-vcodec: Adds decoder dt-bindings for mt8192 media: mtk-vcodec: Add core dec and dec end ipi msg media: mtk-vcodec: Use codec type to separate different hardware media: mtk-vcodec: Remove mtk_vcodec_release_dec_pm media: mtk-vcodec: Remove mtk_vcodec_release_enc_pm .../media/mediatek,vcodec-decoder.yaml | 176 +++++++++++ .../media/mediatek,vcodec-encoder.yaml | 187 ++++++++++++ .../media/mediatek,vcodec-subdev-decoder.yaml | 265 ++++++++++++++++ .../bindings/media/mediatek-vcodec.txt | 131 -------- drivers/media/platform/mtk-vcodec/Makefile | 6 +- .../platform/mtk-vcodec/mtk_vcodec_dec.c | 4 +- .../platform/mtk-vcodec/mtk_vcodec_dec.h | 1 + .../platform/mtk-vcodec/mtk_vcodec_dec_drv.c | 177 ++++++++--- .../platform/mtk-vcodec/mtk_vcodec_dec_hw.c | 201 ++++++++++++ .../platform/mtk-vcodec/mtk_vcodec_dec_hw.h | 53 ++++ .../platform/mtk-vcodec/mtk_vcodec_dec_pm.c | 104 +++++-- .../platform/mtk-vcodec/mtk_vcodec_dec_pm.h | 12 +- .../mtk-vcodec/mtk_vcodec_dec_stateful.c | 2 + .../mtk-vcodec/mtk_vcodec_dec_stateless.c | 21 ++ .../platform/mtk-vcodec/mtk_vcodec_drv.h | 73 ++++- .../platform/mtk-vcodec/mtk_vcodec_enc_drv.c | 21 +- .../platform/mtk-vcodec/mtk_vcodec_enc_pm.c | 10 +- .../platform/mtk-vcodec/mtk_vcodec_enc_pm.h | 3 +- .../platform/mtk-vcodec/mtk_vcodec_intr.c | 27 +- .../platform/mtk-vcodec/mtk_vcodec_intr.h | 4 +- .../platform/mtk-vcodec/mtk_vcodec_util.c | 59 +++- .../platform/mtk-vcodec/mtk_vcodec_util.h | 8 +- .../platform/mtk-vcodec/vdec/vdec_h264_if.c | 2 +- .../mtk-vcodec/vdec/vdec_h264_req_if.c | 2 +- .../platform/mtk-vcodec/vdec/vdec_vp8_if.c | 2 +- .../platform/mtk-vcodec/vdec/vdec_vp9_if.c | 2 +- .../media/platform/mtk-vcodec/vdec_drv_if.c | 21 +- .../media/platform/mtk-vcodec/vdec_ipi_msg.h | 16 +- .../platform/mtk-vcodec/vdec_msg_queue.c | 289 ++++++++++++++++++ .../platform/mtk-vcodec/vdec_msg_queue.h | 143 +++++++++ .../media/platform/mtk-vcodec/vdec_vpu_if.c | 46 ++- .../media/platform/mtk-vcodec/vdec_vpu_if.h | 22 ++ .../platform/mtk-vcodec/venc/venc_h264_if.c | 2 +- .../platform/mtk-vcodec/venc/venc_vp8_if.c | 2 +- 34 files changed, 1800 insertions(+), 294 deletions(-) create mode 100644 Documentation/devicetree/bindings/media/mediatek,vcodec-decoder.yaml create mode 100644 Documentation/devicetree/bindings/media/mediatek,vcodec-encoder.yaml create mode 100644 Documentation/devicetree/bindings/media/mediatek,vcodec-subdev-decoder.yaml delete mode 100644 Documentation/devicetree/bindings/media/mediatek-vcodec.txt create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_hw.c create mode 100644 drivers/media/platform/mtk-vcodec/mtk_vcodec_dec_hw.h create mode 100644 drivers/media/platform/mtk-vcodec/vdec_msg_queue.c create mode 100644 drivers/media/platform/mtk-vcodec/vdec_msg_queue.h -- 2.25.1

2 20

[PATCH] drm/tegra: vic: Handle tegra_drm_alloc() failure
by Thierry Reding 16 Dec '21

16 Dec '21

From: Thierry Reding <treding(a)nvidia.com> This function can return one of several errors in an ERR_PTR()-encoded pointer, so make sure to propogate those on failure. Suggested-by: Robin Murphy <robin.murphy(a)arm.com> Signed-off-by: Thierry Reding <treding(a)nvidia.com> --- drivers/gpu/drm/tegra/vic.c | 2 ++ 1 file changed, 2 insertions(+) diff --git a/drivers/gpu/drm/tegra/vic.c b/drivers/gpu/drm/tegra/vic.c index c5f4d2b13c43..7d2b719ed8d1 100644 --- a/drivers/gpu/drm/tegra/vic.c +++ b/drivers/gpu/drm/tegra/vic.c @@ -237,6 +237,8 @@ static int vic_load_firmware(struct vic *vic) return -ENOMEM; } else { virt = tegra_drm_alloc(tegra, size, &iova); + if (IS_ERR(virt)) + return PTR_ERR(virt); } vic->falcon.firmware.virt = virt; -- 2.34.1

1 0

← Newer
1
...
37
38
39
40
41
42
43
...
72
Older →

Jump to page:

2025

2024

2023

2022

2021

2020

2019

2018

2017

2016

2015

2014

2013

2012

2011

2010

dri-devel December 2021