dri-devel December 2021

dri-devel@lists.freedesktop.org

310 participants
720 discussions

Re: [Intel-gfx] [PATCH] drm/i915/dg2: make GuC FW a requirement for Gen12 and beyond devices
by Robert Beckett 09 Dec '21

09 Dec '21

On 09/12/2021 00:24, John Harrison wrote: > On 12/8/2021 09:58, Robert Beckett wrote: >> On 07/12/2021 23:15, John Harrison wrote: >>> On 12/7/2021 09:53, Adrian Larumbe wrote: >>>> Beginning with DG2, all successive devices will require GuC FW to be >>>> present and loaded at probe() time. This change alters error >>>> handling in >>>> the FW init and load functions so that the driver's probe() function >>>> will >>>> fail if GuC could not be loaded. >>> We still need to load the i915 driver in fall back mode (display but >>> no engines) if the GuC is missing. Otherwise you may have just >>> bricked the user's device. >> >> good point, well made. >> though this still seems like an issue for gen12+ (excluding rkl and adl). >> >> maybe a redesign of toplevel driver probe, with >> i915_driver_early_probe before i915_driver_create could work. If the >> GuC fw is not found, it could then register a new kms only version of >> i915_drm_driver. >> >> or something like like that ... > Or we could just leave it all alone? > > AFAIK, this is working just fine at the moment. If the platform default > is to use GuC submission and you have the fw then the driver loads fine. > If the platform default is to use GuC submission and you don't have the > firmware then the driver wedges but keeps loading. That means it returns > no engines to userland but the display is unaffected. Hence the user > gets a slow but safe fallback path in which they can still load their > Ubuntu desktop and try to work out what package they need to install. > > What is the problem that this patch is trying to fix? In dg2 enablement branch, when fw was unavailable, submissions could still be attempted and it would segfault the kernel due to some function pointers not being set up. From what you said, it sounds like this may just be a bug in the dg2 enablement, which we can diagnose and fix if so. Though I still think it would be a better design to only register kms capabilities if that is all that will be supported without the fw. It seems a bit messy to advertise render and create the render node for userland sw to attempt to use and have it fail, but if that is the prefered design, then we can make dg2 match that. > > John. > > >> >>> >>> Also, we do want to be able to disable the GuC via the enable_guc >>> module parameter. >>> >>> John. >>> >>> >>>> Signed-off-by: Adrian Larumbe <adrian.larumbe(a)collabora.com> >>>> --- >>>> drivers/gpu/drm/i915/gt/uc/intel_uc.c | 20 ++++++++++++++++---- >>>> drivers/gpu/drm/i915/gt/uc/intel_uc.h | 4 ++-- >>>> drivers/gpu/drm/i915/i915_gem.c | 7 ++++++- >>>> 3 files changed, 24 insertions(+), 7 deletions(-) >>>> >>>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.c >>>> b/drivers/gpu/drm/i915/gt/uc/intel_uc.c >>>> index 7660eba893fa..8b0778b6d9ab 100644 >>>> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.c >>>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.c >>>> @@ -277,14 +277,19 @@ static void guc_disable_communication(struct >>>> intel_guc *guc) >>>> drm_dbg(&i915->drm, "GuC communication disabled\n"); >>>> } >>>> -static void __uc_fetch_firmwares(struct intel_uc *uc) >>>> +static int __uc_fetch_firmwares(struct intel_uc *uc) >>>> { >>>> + struct drm_i915_private *i915 = uc_to_gt(uc)->i915; >>>> int err; >>>> GEM_BUG_ON(!intel_uc_wants_guc(uc)); >>>> err = intel_uc_fw_fetch(&uc->guc.fw); >>>> if (err) { >>>> + /* GuC is mandatory on Gen12 and beyond */ >>>> + if (GRAPHICS_VER(i915) >= 12) >>>> + return err; >>>> + >>>> /* Make sure we transition out of transient "SELECTED" >>>> state */ >>>> if (intel_uc_wants_huc(uc)) { >>>> drm_dbg(&uc_to_gt(uc)->i915->drm, >>>> @@ -293,11 +298,13 @@ static void __uc_fetch_firmwares(struct >>>> intel_uc *uc) >>>> INTEL_UC_FIRMWARE_ERROR); >>>> } >>>> - return; >>>> + return 0; >>>> } >>>> if (intel_uc_wants_huc(uc)) >>>> intel_uc_fw_fetch(&uc->huc.fw); >>>> + >>>> + return 0; >>>> } >>>> static void __uc_cleanup_firmwares(struct intel_uc *uc) >>>> @@ -308,14 +315,19 @@ static void __uc_cleanup_firmwares(struct >>>> intel_uc *uc) >>>> static int __uc_init(struct intel_uc *uc) >>>> { >>>> + struct drm_i915_private *i915 = uc_to_gt(uc)->i915; >>>> struct intel_guc *guc = &uc->guc; >>>> struct intel_huc *huc = &uc->huc; >>>> int ret; >>>> GEM_BUG_ON(!intel_uc_wants_guc(uc)); >>>> - if (!intel_uc_uses_guc(uc)) >>>> - return 0; >>>> + if (!intel_uc_uses_guc(uc)) { >>>> + if (GRAPHICS_VER(i915) >= 12) >>>> + return -EINVAL; >>>> + else >>>> + return 0; >>>> + } >>>> if (i915_inject_probe_failure(uc_to_gt(uc)->i915)) >>>> return -ENOMEM; >>>> diff --git a/drivers/gpu/drm/i915/gt/uc/intel_uc.h >>>> b/drivers/gpu/drm/i915/gt/uc/intel_uc.h >>>> index 866b462821c0..3bcd781447bc 100644 >>>> --- a/drivers/gpu/drm/i915/gt/uc/intel_uc.h >>>> +++ b/drivers/gpu/drm/i915/gt/uc/intel_uc.h >>>> @@ -17,7 +17,7 @@ struct intel_uc; >>>> struct intel_uc_ops { >>>> int (*sanitize)(struct intel_uc *uc); >>>> - void (*init_fw)(struct intel_uc *uc); >>>> + int (*init_fw)(struct intel_uc *uc); >>>> void (*fini_fw)(struct intel_uc *uc); >>>> int (*init)(struct intel_uc *uc); >>>> void (*fini)(struct intel_uc *uc); >>>> @@ -104,7 +104,7 @@ static inline _TYPE intel_uc_##_NAME(struct >>>> intel_uc *uc) \ >>>> return _RET; \ >>>> } >>>> intel_uc_ops_function(sanitize, sanitize, int, 0); >>>> -intel_uc_ops_function(fetch_firmwares, init_fw, void, ); >>>> +intel_uc_ops_function(fetch_firmwares, init_fw, int, 0); >>>> intel_uc_ops_function(cleanup_firmwares, fini_fw, void, ); >>>> intel_uc_ops_function(init, init, int, 0); >>>> intel_uc_ops_function(fini, fini, void, ); >>>> diff --git a/drivers/gpu/drm/i915/i915_gem.c >>>> b/drivers/gpu/drm/i915/i915_gem.c >>>> index 527228d4da7e..7f8204af6826 100644 >>>> --- a/drivers/gpu/drm/i915/i915_gem.c >>>> +++ b/drivers/gpu/drm/i915/i915_gem.c >>>> @@ -1049,7 +1049,12 @@ int i915_gem_init(struct drm_i915_private >>>> *dev_priv) >>>> if (ret) >>>> return ret; >>>> - intel_uc_fetch_firmwares(&dev_priv->gt.uc); >>>> + ret = intel_uc_fetch_firmwares(&dev_priv->gt.uc); >>>> + if (ret) { >>>> + i915_probe_error(dev_priv, "Failed to fetch firmware\n"); >>>> + return ret; >>>> + } >>>> + >>>> intel_wopcm_init(&dev_priv->wopcm); >>>> ret = i915_init_ggtt(dev_priv); >>> >

2 1

[PATCH 1/2] drm/ bridge: tc358762: move bridge init to enable callback
by Dmitry Baryshkov 09 Dec '21

09 Dec '21

During the pre_enable time the previous bridge (e.g. DSI host) might be not initialized yet. Move the regulator enablement and bridge init to te enable callback (and consequently regulator disblement to disable). Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov(a)linaro.org> --- drivers/gpu/drm/bridge/tc358762.c | 20 ++++++++++---------- 1 file changed, 10 insertions(+), 10 deletions(-) diff --git a/drivers/gpu/drm/bridge/tc358762.c b/drivers/gpu/drm/bridge/tc358762.c index 7104828024fd..ebdf771a1e49 100644 --- a/drivers/gpu/drm/bridge/tc358762.c +++ b/drivers/gpu/drm/bridge/tc358762.c @@ -64,7 +64,7 @@ struct tc358762 { struct drm_connector connector; struct regulator *regulator; struct drm_bridge *panel_bridge; - bool pre_enabled; + bool enabled; int error; }; @@ -125,26 +125,26 @@ static int tc358762_init(struct tc358762 *ctx) return tc358762_clear_error(ctx); } -static void tc358762_post_disable(struct drm_bridge *bridge) +static void tc358762_disable(struct drm_bridge *bridge) { struct tc358762 *ctx = bridge_to_tc358762(bridge); int ret; /* - * The post_disable hook might be called multiple times. + * The disable hook might be called multiple times. * We want to avoid regulator imbalance below. */ - if (!ctx->pre_enabled) + if (!ctx->enabled) return; - ctx->pre_enabled = false; + ctx->enabled = false; ret = regulator_disable(ctx->regulator); if (ret < 0) dev_err(ctx->dev, "error disabling regulators (%d)\n", ret); } -static void tc358762_pre_enable(struct drm_bridge *bridge) +static void tc358762_enable(struct drm_bridge *bridge) { struct tc358762 *ctx = bridge_to_tc358762(bridge); int ret; @@ -157,7 +157,7 @@ static void tc358762_pre_enable(struct drm_bridge *bridge) if (ret < 0) dev_err(ctx->dev, "error initializing bridge (%d)\n", ret); - ctx->pre_enabled = true; + ctx->enabled = true; } static int tc358762_attach(struct drm_bridge *bridge, @@ -170,8 +170,8 @@ static int tc358762_attach(struct drm_bridge *bridge, } static const struct drm_bridge_funcs tc358762_bridge_funcs = { - .post_disable = tc358762_post_disable, - .pre_enable = tc358762_pre_enable, + .disable = tc358762_disable, + .enable = tc358762_enable, .attach = tc358762_attach, }; @@ -218,7 +218,7 @@ static int tc358762_probe(struct mipi_dsi_device *dsi) mipi_dsi_set_drvdata(dsi, ctx); ctx->dev = dev; - ctx->pre_enabled = false; + ctx->enabled = false; /* TODO: Find out how to get dual-lane mode working */ dsi->lanes = 1; -- 2.33.0

3 4

[PATCH 0/4] drm/i915: Basic enabling of 64k page support
by Ramalingam C 09 Dec '21

09 Dec '21

Preparational patches for 64k page support. Matthew Auld (3): drm/i915/xehpsdv: set min page-size to 64K drm/i915/gtt/xehpsdv: move scratch page to system memory drm/i915: enforce min page size for scratch Stuart Summers (1): drm/i915: Add has_64k_pages flag drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 6 +++++- drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 1 + drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 23 +++++++++++++++++++-- drivers/gpu/drm/i915/gt/intel_ggtt.c | 3 +++ drivers/gpu/drm/i915/gt/intel_gtt.c | 14 ++++++++++++- drivers/gpu/drm/i915/gt/intel_gtt.h | 2 ++ drivers/gpu/drm/i915/gt/intel_region_lmem.c | 5 ++++- drivers/gpu/drm/i915/i915_drv.h | 8 +++++++ drivers/gpu/drm/i915/i915_pci.c | 2 ++ drivers/gpu/drm/i915/intel_device_info.h | 1 + drivers/gpu/drm/i915/selftests/mock_gtt.c | 2 ++ 11 files changed, 62 insertions(+), 5 deletions(-) -- 2.20.1

5 12

[PATCH v4 0/4] ti-sn65dsi83 patches
by Alexander Stein 09 Dec '21

09 Dec '21

Changes in V4 of this set: * Rebased to next-20211118 (due to merge-conflict in linux-next) * Added Rob Herring's Ack on Patch 1 & 3 * Reworked patch 4 due to other changes in linux-next * Removed Sam Ravnborg's Reviewed-by for patch4 due to rework Changes in V3 of this set: * Do not require vcc-supply in bindings, making it purely optional * Move regulator enable/disable to sn65dsi83_atomic_pre_enable and sn65dsi83_atomic_disable Changes in V2 of this set: * Add patch from Laurent for fixing the binding regarding optional GPIO * Reorder patches so bindings are changed beforehand * Add small fixes from Sam's review Alexander Stein (3): drm/bridge: ti-sn65dsi83: Make enable GPIO optional dt-bindings: drm/bridge: ti-sn65dsi83: Add vcc supply bindings drm/bridge: ti-sn65dsi83: Add vcc supply regulator support Laurent Pinchart (1): dt-bindings: display: bridge: sn65dsi83: Make enable GPIO optional .../bindings/display/bridge/ti,sn65dsi83.yaml | 5 ++++- drivers/gpu/drm/bridge/ti-sn65dsi83.c | 22 ++++++++++++++++++- 2 files changed, 25 insertions(+), 2 deletions(-) -- 2.25.1

3 11

[PATCH v2] i2c: tegra: use i2c_timings for bus clock freq
by Akhil R 09 Dec '21

09 Dec '21

Use i2c_timings struct and corresponding methods to get bus clock frequency Signed-off-by: Akhil R <akhilrajeev(a)nvidia.com> Suggested-by: Andy Shevchenko <andy.shevchenko(a)gmail.com> Reviewed-by: Andy Shevchenko <andy.shevchenko(a)gmail.com> --- drivers/i2c/busses/i2c-tegra.c | 20 +++++++++----------- 1 file changed, 9 insertions(+), 11 deletions(-) v1->v2: Added temp var for i2c_timings struct in function. diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index a5be8f0..4cbe89b 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -246,7 +246,7 @@ struct tegra_i2c_hw_feature { * @msg_buf: pointer to current message data * @msg_buf_remaining: size of unsent data in the message buffer * @msg_read: indicates that the transfer is a read access - * @bus_clk_rate: current I2C bus clock rate + * @timings: i2c timings information like bus frequency * @multimaster_mode: indicates that I2C controller is in multi-master mode * @tx_dma_chan: DMA transmit channel * @rx_dma_chan: DMA receive channel @@ -273,7 +273,7 @@ struct tegra_i2c_dev { unsigned int nclocks; struct clk *div_clk; - u32 bus_clk_rate; + struct i2c_timings timings; struct completion msg_complete; size_t msg_buf_remaining; @@ -610,6 +610,7 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) { u32 val, clk_divisor, clk_multiplier, tsu_thd, tlow, thigh, non_hs_mode; acpi_handle handle = ACPI_HANDLE(i2c_dev->dev); + struct i2c_timings *t = &i2c_dev->timings; int err; /* @@ -642,14 +643,14 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) if (i2c_dev->is_vi) tegra_i2c_vi_init(i2c_dev); - switch (i2c_dev->bus_clk_rate) { + switch (t->bus_freq_hz) { case I2C_MAX_STANDARD_MODE_FREQ + 1 ... I2C_MAX_FAST_MODE_PLUS_FREQ: default: tlow = i2c_dev->hw->tlow_fast_fastplus_mode; thigh = i2c_dev->hw->thigh_fast_fastplus_mode; tsu_thd = i2c_dev->hw->setup_hold_time_fast_fast_plus_mode; - if (i2c_dev->bus_clk_rate > I2C_MAX_FAST_MODE_FREQ) + if (t->bus_freq_hz > I2C_MAX_FAST_MODE_FREQ) non_hs_mode = i2c_dev->hw->clk_divisor_fast_plus_mode; else non_hs_mode = i2c_dev->hw->clk_divisor_fast_mode; @@ -685,7 +686,7 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) clk_multiplier = (tlow + thigh + 2) * (non_hs_mode + 1); err = clk_set_rate(i2c_dev->div_clk, - i2c_dev->bus_clk_rate * clk_multiplier); + t->bus_freq_hz * clk_multiplier); if (err) { dev_err(i2c_dev->dev, "failed to set div-clk rate: %d\n", err); return err; @@ -724,7 +725,7 @@ static int tegra_i2c_disable_packet_mode(struct tegra_i2c_dev *i2c_dev) * before disabling the controller so that the STOP condition has * been delivered properly. */ - udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate)); + udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->timings.bus_freq_hz)); cnfg = i2c_readl(i2c_dev, I2C_CNFG); if (cnfg & I2C_CNFG_PACKET_MODE_EN) @@ -1254,7 +1255,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev, * Total bits = 9 bits per byte (including ACK bit) + Start & stop bits */ xfer_time += DIV_ROUND_CLOSEST(((xfer_size * 9) + 2) * MSEC_PER_SEC, - i2c_dev->bus_clk_rate); + i2c_dev->timings.bus_freq_hz); int_mask = I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST; tegra_i2c_unmask_irq(i2c_dev, int_mask); @@ -1633,10 +1634,7 @@ static void tegra_i2c_parse_dt(struct tegra_i2c_dev *i2c_dev) bool multi_mode; int err; - err = device_property_read_u32(i2c_dev->dev, "clock-frequency", - &i2c_dev->bus_clk_rate); - if (err) - i2c_dev->bus_clk_rate = I2C_MAX_STANDARD_MODE_FREQ; + i2c_parse_fw_timings(i2c_dev->dev, &i2c_dev->timings, true); multi_mode = device_property_read_bool(i2c_dev->dev, "multi-master"); i2c_dev->multimaster_mode = multi_mode; -- 2.7.4

1 0

[PATCH v2 00/16] drm/i915: Remove short term pins from execbuf.
by Maarten Lankhorst 09 Dec '21

09 Dec '21

New version of the series, with feedback from previous series added. First 11 patches are clean, some small fixes might required still for all to pass. Maarten Lankhorst (16): drm/i915: Remove unused bits of i915_vma/active api drm/i915: Change shrink ordering to use locking around unbinding. drm/i915: Remove pages_mutex and intel_gtt->vma_ops.set/clear_pages members, v2. drm/i915: Take object lock in i915_ggtt_pin if ww is not set drm/i915: Force ww lock for i915_gem_object_ggtt_pin_ww drm/i915: Ensure gem_contexts selftests work with unbind changes. drm/i915: Take trylock during eviction, v2. drm/i915: Pass trylock context to callers drm/i915: Ensure i915_vma tests do not get -ENOSPC with the locking changes. drm/i915: Make i915_gem_evict_vm work correctly for already locked objects drm/i915: Call i915_gem_evict_vm in vm_fault_gtt to prevent new ENOSPC errors drm/i915: Add i915_vma_unbind_unlocked, and take obj lock for i915_vma_unbind drm/i915: Require object lock when freeing pages during destruction drm/i915: Remove assert_object_held_shared drm/i915: Remove support for unlocked i915_vma unbind drm/i915: Remove short-term pins from execbuf, v5. drivers/gpu/drm/i915/display/intel_dpt.c | 2 - drivers/gpu/drm/i915/display/intel_fb_pin.c | 2 +- .../gpu/drm/i915/gem/i915_gem_execbuffer.c | 250 ++++---- drivers/gpu/drm/i915/gem/i915_gem_mman.c | 18 +- drivers/gpu/drm/i915/gem/i915_gem_object.c | 9 +- drivers/gpu/drm/i915/gem/i915_gem_object.h | 22 +- drivers/gpu/drm/i915/gem/i915_gem_pages.c | 12 +- drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 44 +- drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_userptr.c | 2 +- .../gpu/drm/i915/gem/selftests/huge_pages.c | 2 +- .../i915/gem/selftests/i915_gem_client_blt.c | 2 +- .../drm/i915/gem/selftests/i915_gem_context.c | 54 +- .../drm/i915/gem/selftests/i915_gem_mman.c | 6 + drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 15 - drivers/gpu/drm/i915/gt/intel_engine_pm.c | 2 +- drivers/gpu/drm/i915/gt/intel_ggtt.c | 450 ++------------ drivers/gpu/drm/i915/gt/intel_ggtt_fencing.c | 1 - drivers/gpu/drm/i915/gt/intel_gtt.c | 13 - drivers/gpu/drm/i915/gt/intel_gtt.h | 7 - drivers/gpu/drm/i915/gt/intel_ppgtt.c | 12 - drivers/gpu/drm/i915/gt/mock_engine.c | 2 +- drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 2 +- drivers/gpu/drm/i915/gt/selftest_migrate.c | 2 +- drivers/gpu/drm/i915/gvt/aperture_gm.c | 2 +- drivers/gpu/drm/i915/i915_active.c | 28 +- drivers/gpu/drm/i915/i915_active.h | 17 +- drivers/gpu/drm/i915/i915_drv.h | 12 +- drivers/gpu/drm/i915/i915_gem.c | 28 +- drivers/gpu/drm/i915/i915_gem_evict.c | 64 +- drivers/gpu/drm/i915/i915_gem_gtt.c | 8 +- drivers/gpu/drm/i915/i915_gem_gtt.h | 4 + drivers/gpu/drm/i915/i915_vgpu.c | 2 +- drivers/gpu/drm/i915/i915_vma.c | 580 +++++++++++++++--- drivers/gpu/drm/i915/i915_vma.h | 6 +- drivers/gpu/drm/i915/i915_vma_types.h | 1 - .../gpu/drm/i915/selftests/i915_gem_evict.c | 27 +- drivers/gpu/drm/i915/selftests/i915_gem_gtt.c | 48 +- drivers/gpu/drm/i915/selftests/i915_vma.c | 19 +- drivers/gpu/drm/i915/selftests/mock_gtt.c | 4 - 40 files changed, 942 insertions(+), 841 deletions(-) -- 2.34.0

4 49

[PATCH] net: mana: Fix memory leak in mana_hwc_create_wq
by José Expósito 09 Dec '21

09 Dec '21

If allocating the DMA buffer fails, mana_hwc_destroy_wq was called without previously storing the pointer to the queue. In order to avoid leaking the pointer to the queue, store it as soon as it is allocated. Addresses-Coverity-ID: 1484720 ("Resource leak") Signed-off-by: José Expósito <jose.exposito89(a)gmail.com> --- drivers/net/ethernet/microsoft/mana/hw_channel.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/net/ethernet/microsoft/mana/hw_channel.c b/drivers/net/ethernet/microsoft/mana/hw_channel.c index 34b971ff8ef8..078d6a5a0768 100644 --- a/drivers/net/ethernet/microsoft/mana/hw_channel.c +++ b/drivers/net/ethernet/microsoft/mana/hw_channel.c @@ -480,16 +480,16 @@ static int mana_hwc_create_wq(struct hw_channel_context *hwc, if (err) goto out; - err = mana_hwc_alloc_dma_buf(hwc, q_depth, max_msg_size, - &hwc_wq->msg_buf); - if (err) - goto out; - hwc_wq->hwc = hwc; hwc_wq->gdma_wq = queue; hwc_wq->queue_depth = q_depth; hwc_wq->hwc_cq = hwc_cq; + err = mana_hwc_alloc_dma_buf(hwc, q_depth, max_msg_size, + &hwc_wq->msg_buf); + if (err) + goto out; + *hwc_wq_ptr = hwc_wq; return 0; out: -- 2.25.1

3 2

[PATCH] i2c: tegra: use i2c_timings for bus clock freq
by Akhil R 09 Dec '21

09 Dec '21

Use i2c_timings struct and corresponding methods to get bus clock frequency Signed-off-by: Akhil R <akhilrajeev(a)nvidia.com> --- drivers/i2c/busses/i2c-tegra.c | 19 ++++++++----------- 1 file changed, 8 insertions(+), 11 deletions(-) The patch is in response to the discussion in a previous patch to use i2c_timings struct for bus freq. ref. https://lkml.org/lkml/2021/11/25/767 diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index a5be8f0..ffd2ad2 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -246,7 +246,7 @@ struct tegra_i2c_hw_feature { * @msg_buf: pointer to current message data * @msg_buf_remaining: size of unsent data in the message buffer * @msg_read: indicates that the transfer is a read access - * @bus_clk_rate: current I2C bus clock rate + * @timings: i2c timings information like bus frequency * @multimaster_mode: indicates that I2C controller is in multi-master mode * @tx_dma_chan: DMA transmit channel * @rx_dma_chan: DMA receive channel @@ -273,7 +273,7 @@ struct tegra_i2c_dev { unsigned int nclocks; struct clk *div_clk; - u32 bus_clk_rate; + struct i2c_timings timings; struct completion msg_complete; size_t msg_buf_remaining; @@ -642,14 +642,14 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) if (i2c_dev->is_vi) tegra_i2c_vi_init(i2c_dev); - switch (i2c_dev->bus_clk_rate) { + switch (i2c_dev->timings.bus_freq_hz) { case I2C_MAX_STANDARD_MODE_FREQ + 1 ... I2C_MAX_FAST_MODE_PLUS_FREQ: default: tlow = i2c_dev->hw->tlow_fast_fastplus_mode; thigh = i2c_dev->hw->thigh_fast_fastplus_mode; tsu_thd = i2c_dev->hw->setup_hold_time_fast_fast_plus_mode; - if (i2c_dev->bus_clk_rate > I2C_MAX_FAST_MODE_FREQ) + if (i2c_dev->timings.bus_freq_hz > I2C_MAX_FAST_MODE_FREQ) non_hs_mode = i2c_dev->hw->clk_divisor_fast_plus_mode; else non_hs_mode = i2c_dev->hw->clk_divisor_fast_mode; @@ -685,7 +685,7 @@ static int tegra_i2c_init(struct tegra_i2c_dev *i2c_dev) clk_multiplier = (tlow + thigh + 2) * (non_hs_mode + 1); err = clk_set_rate(i2c_dev->div_clk, - i2c_dev->bus_clk_rate * clk_multiplier); + i2c_dev->timings.bus_freq_hz * clk_multiplier); if (err) { dev_err(i2c_dev->dev, "failed to set div-clk rate: %d\n", err); return err; @@ -724,7 +724,7 @@ static int tegra_i2c_disable_packet_mode(struct tegra_i2c_dev *i2c_dev) * before disabling the controller so that the STOP condition has * been delivered properly. */ - udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->bus_clk_rate)); + udelay(DIV_ROUND_UP(2 * 1000000, i2c_dev->timings.bus_freq_hz)); cnfg = i2c_readl(i2c_dev, I2C_CNFG); if (cnfg & I2C_CNFG_PACKET_MODE_EN) @@ -1254,7 +1254,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev, * Total bits = 9 bits per byte (including ACK bit) + Start & stop bits */ xfer_time += DIV_ROUND_CLOSEST(((xfer_size * 9) + 2) * MSEC_PER_SEC, - i2c_dev->bus_clk_rate); + i2c_dev->timings.bus_freq_hz); int_mask = I2C_INT_NO_ACK | I2C_INT_ARBITRATION_LOST; tegra_i2c_unmask_irq(i2c_dev, int_mask); @@ -1633,10 +1633,7 @@ static void tegra_i2c_parse_dt(struct tegra_i2c_dev *i2c_dev) bool multi_mode; int err; - err = device_property_read_u32(i2c_dev->dev, "clock-frequency", - &i2c_dev->bus_clk_rate); - if (err) - i2c_dev->bus_clk_rate = I2C_MAX_STANDARD_MODE_FREQ; + i2c_parse_fw_timings(i2c_dev->dev, &i2c_dev->timings, true); multi_mode = device_property_read_bool(i2c_dev->dev, "multi-master"); i2c_dev->multimaster_mode = multi_mode; -- 2.7.4

2 1

[PATCH v10 00/10 RESEND] use DYNAMIC_DEBUG to implement DRM.debug & DRM.trace
by Jim Cromie 09 Dec '21

09 Dec '21

Hi Jason, Greg, DRM-everyone, everyone, resend to add more people, after rebasing on master to pick up 306589856399 drm/print: Add deprecation notes to DRM_...() functions This patchset has 3 separate but related parts: 1. DEFINE_DYNAMIC_DEBUG_BITGRPS macro [patch 1/10] Declares DRM.debug style bitmap, bits control pr_debugs by matching formats Adds callback to translate bits to $cmd > dynamic_debug/control This could obsolete EXPORT(dynamic_debug_exec_queries) not included. /* anticipated_usage */ static struct dyndbg_desc drm_categories_map[] = { [0] = { DRM_DBG_CAT_CORE }, [1] = { DRM_DBG_CAT_DRIVER }, [2] = { DRM_DBG_CAT_KMS }, [3] = { DRM_DBG_CAT_PRIME }, ... }; DEFINE_DYNAMIC_DEBUG_BITGRPS(debug, __drm_debug, " bits control drm.debug categories ", drm_categories_map); Please consider this patch for -next/now/current: - new interface, new code, no users to break - allows DRM folks to consider in earnest. - api bikeshedding to do ? struct dyndbg_desc isnt that great a name, others too probably. 2. use (1) to reimplement drm.debug [patches 3-7]: 1st in amdgpu & i915 to control existing pr_debugs by their formats POC for (1) then in drm-print, for all drm.debug API users has kernel-footprint impact: amdgpu has ~3k pr_debugs. (120kb callsite data) i915.ko has ~2k avoids drm_debug_enabled(), gives NOOP savings & new flexibility. changes drm.debug categories from enum to format-prefix-string alters in-log format to include the format-prefix-string Daniel Vetter liked this at -v3 https://lore.kernel.org/lkml/YPbPvm%2FxcBlTK1wq@phenom.ffwll.local/ Im sure Ive (still) missed stuff. 3. separately, Sean Paul proposed: drm.trace to mirror drm.debug to tracefs https://patchwork.freedesktop.org/series/78133/ He argues: tracefs is fast/lightweight compared to syslog independent selection (of drm categories) to tracefs gives tailored traffic w.o flooding syslog ISTM he's correct. So it follows that write-to-tracefs is also a good feature for dyndbg, where its then available for all pr_debug users, including all of drm, on a per-site basis, via echo +T >control. (iff CONFIG_TRACING). So basically, I borg'd his: [patch 14/14] drm/print: Add tracefs support to the drm logging helpers Then I added a T flag, so it can be toggled from shell: # turn on all drm's pr_debug --> tracefs echo module drm +T > /proc/dynamic_debug/control It appears to just work: (RFC) The instance name is a placeholder, per-module subdirs kinda fits the tracefs pattern, but full mod/file-basename/function/line feels like overkill, mod/basename-func.line would flatten it nicely. RFC. [root@gandalf dyndbg-tracefs]# pwd /sys/kernel/tracing/instances/dyndbg-tracefs [root@gandalf dyndbg-tracefs]# echo 1 > /sys/module/drm/parameters/trace [root@gandalf dyndbg-tracefs]# head -n16 trace | sed -e 's/^#//' tracer: nop entries-in-buffer/entries-written: 405/405 #P:24 _-----=> irqs-off / _----=> need-resched | / _---=> hardirq/softirq || / _--=> preempt-depth ||| / _-=> migrate-disable |||| / delay TASK-PID CPU# ||||| TIMESTAMP FUNCTION | | | ||||| | | <...>-2254 [000] ..... 7040.894352: __dynamic_pr_debug: drm:core: comm="gnome-shel:cs0" pid=2254, dev=0xe200, auth=1, AMDGPU_CS <...>-2207 [015] ..... 7040.894654: __dynamic_pr_debug: drm:core: comm="gnome-shell" pid=2207, dev=0xe200, auth=1, DRM_IOCTL_MODE_ADDFB2 <...>-2207 [015] ..... 7040.995403: __dynamic_pr_debug: drm:core: comm="gnome-shell" pid=2207, dev=0xe200, auth=1, DRM_IOCTL_MODE_RMFB <...>-2207 [015] ..... 7040.995413: __dynamic_pr_debug: drm:core: OBJ ID: 121 (2) This is the pr-debug doing most of that logging: (from dynamic_debug/control) drivers/gpu/drm/drm_ioctl.c:866 [drm]drm_ioctl =T "drm:core: comm=\042%s\042 pid=%d, dev=0x%lx, auth=%d, %s\012" Turning on decoration flags changes the trace: echo module drm format drm:core: +mflt > /proc/dynamic_debug/control TASK-PID CPU# ||||| TIMESTAMP FUNCTION | | | ||||| | | <...>-2254 [003] ..... 15980.936660: __dynamic_pr_debug: [2254] drm:drm_ioctl:866: drm:core: comm="gnome-shel:cs0" pid=2254, dev=0xe200, auth=1, AMDGPU_CS <...>-2207 [015] ..... 15980.936966: __dynamic_pr_debug: [2207] drm:drm_ioctl:866: drm:core: comm="gnome-shell" pid=2207, dev=0xe200, auth=1, DRM_IOCTL_MODE_ADDFB2 <...>-2207 [015] ..... 15981.037727: __dynamic_pr_debug: [2207] drm:drm_ioctl:866: drm:core: comm="gnome-shell" pid=2207, dev=0xe200, auth=1, DRM_IOCTL_MODE_RMFB <...>-2207 [015] ..... 15981.037739: __dynamic_pr_debug: [2207] drm:drm_mode_object_put:195: drm:core: OBJ ID: 124 (2) <...>-2207 [015] ..... 15981.037742: __dynamic_pr_debug: [2207] drm:drm_mode_object_put:195: drm:core: OBJ ID: 124 (1) The FUNCTION could stand tweaking (to match the callsite in the control file, cited above), or perhaps replaced by the 'mfl' decorations; the 't' flag is redundant for trace. Meh. SELFTEST A previous version of this patchset added test_dynamic_debug.ko, but it relied upon code I ripped out when I made tracefs available by default (without modules having to register 1st). So it fails 10/29 tests, which counted +T sites executed, via side effect. TODO: userspace selftest # to set expected tracing activity echo module test_dynamic_debug function do_debugging +T > control # run do_debugging function (todo: add sysfs knob) echo 2 > /sys/module/test-dynamic-debug/parameters/run_me If thats wrapped in the right trace_on, trace_pipe, etc incantations, the +T enabled pr_debugs in do_debugging() can be counted, compared against expectations, and passed or failed. change since v9: . patch confict against drm-misc resolved . s/CATEGORIES/BITGRPS/ in 1/10 - keep name generic: bitmap + groups . CATEGORIES is drm term, use it there only . fix api friction wrt drm.trace knob 2 separate macros: DEFINE_DYNAMIC_DEBUG_{LOG,TRACE}_GROUPS - JBaron v9: https://patchwork.freedesktop.org/series/96327/ v8: https://patchwork.freedesktop.org/series/93914/ https://lore.kernel.org/lkml/20210915163957.2949166-1-jim.cromie@gmail.com/ The major change since v8 is that +T now works for all users, if CONFIG_TRACING=y, otherwise it complains/errors. SUMMARY - drm as dyndbg user adds almost 9k callsites to kernel running this patchset substantial footprint substantial source of pr-debug-trace events (not all, but some useful) [jimc@gandalf wk-next]$ wc /proc/dynamic_debug/control 8927 71062 1099699 /proc/dynamic_debug/control [jimc@gandalf wk-next]$ uname -a Linux gandalf 5.15.0-rh2-12144-g5d5db04dfb0c #3 SMP PREEMPT Thu Nov 11 10:5 - pr_debug as event provider using exported trace_array_printk cheap with JUMP_LABEL precise, ad-hoc or organized callsite enablement callsite descriptor is in its interface, so are VARARGS inspectable, extensible wo api churn, iff trace_array_printk can do it. Jim Cromie (10): dyndbg: add DEFINE_DYNAMIC_DEBUG_BITGRPS macro and callbacks drm: fix doc grammar amdgpu: use dyndbg.BITGRPS to control existing pr_debugs i915/gvt: trim spaces from pr_debug "gvt: core:" prefixes i915/gvt: use dyndbg.BITGRPS for existing pr_debugs drm_print: add choice to use dynamic debug in drm-debug drm_print: instrument drm_debug_enabled dyndbg: add print-to-tracefs, selftest with it - RFC dyndbg: create DEFINE_DYNAMIC_DEBUG_LOG|TRACE_GROUPS drm: use DEFINE_DYNAMIC_DEBUG_TRACE_GROUPS in 3 places .../admin-guide/dynamic-debug-howto.rst | 7 +- MAINTAINERS | 1 + drivers/gpu/drm/Kconfig | 26 ++ drivers/gpu/drm/Makefile | 2 + drivers/gpu/drm/amd/amdgpu/Makefile | 2 + .../gpu/drm/amd/display/dc/core/dc_debug.c | 55 ++++- drivers/gpu/drm/drm_print.c | 62 +++-- drivers/gpu/drm/i915/Makefile | 2 + drivers/gpu/drm/i915/gvt/debug.h | 18 +- drivers/gpu/drm/i915/intel_gvt.c | 47 ++++ include/drm/drm_drv.h | 2 +- include/drm/drm_print.h | 182 +++++++++++--- include/linux/dynamic_debug.h | 88 ++++++- lib/Kconfig.debug | 11 + lib/Makefile | 1 + lib/dynamic_debug.c | 203 ++++++++++++++-- lib/test_dynamic_debug.c | 222 ++++++++++++++++++ 17 files changed, 843 insertions(+), 88 deletions(-) create mode 100644 lib/test_dynamic_debug.c -- 2.31.1

7 28

[PULL] drm-intel-gt-next
by Tvrtko Ursulin 09 Dec '21

09 Dec '21

Hi Dave, Daniel, Here goes the first PR towards 5.17. On the bugfixing front most user visible items are a fix for GPU hangs caused by certain media and OpenCL workloads applicable from Gen9 (Skylake) onward, a fix for GPU hangs in Gnome shell on Tigerlake platforms and a fix for runtime power management handling in the PXP code. Other than that there is a bunch of bugfixes relating to the GuC backend (locking, error capture, engine resets, incorrect error handling in the uapi entry points, selftest timeout increases where required, removing a tracepoint field). Continuing with the GuC but on the feature front, it has gained support for wait boosting and accurate engine busyness statistics bringing it closer to parity with the existing driver paths. Among other fixes, most interesting ones are closing the missed async clflush under memory pressure corner case, making sure MOCS cannot be used to bypass the last level cache when reading the scratch page and improving the robustness of error capture under memory pressure. With regards to new platform support a few DG2 and XeHP SDV workarounds have arrived, together with some fixes for DG2 buffer migration. Also some code refactoring happened to prepare for more future platforms. Work on discrete memory enablement and TTM has continued with good pace, both by fixing code previously merged and by adding new functionality. Failsafe and asynchronous migration would be the headline features here, fixing both possible security issues and also improving eviction performance. TTM backend has also gained support for cached system memory which improves performance during shrinking and prepares the code base for using TTM with integrated GPUs. Other than these headline features and fixes, there is a bunch of smaller cleanups and further fixups as usual. There are also two drm-next backmarges from the rc2 timeframe which Thomas and Maarten needed for their feature work on async migration and ongoing driver refactoring. Regards, Tvrtko *** drm-intel-gt-next-2021-12-09: Core Changes: - Fix PENDING_ERROR leak in dma_fence_array_signaled() (Thomas Hellström) Driver Changes: - Fix runtime PM handling during PXP suspend (Tejas Upadhyay) - Improve eviction performance on discrete by implementing async TTM moves (Thomas Hellström, Maarten Lankhorst) - Improve robustness of error capture under memory pressure (Thomas Hellström) - Fix GuC PMU versus GPU reset handling (Umesh Nerlige Ramappa) - Use per device iommu check (Tvrtko Ursulin) - Make error capture work with async migration (Thomas Hellström) - Revert incorrect implementation of Wa_1508744258 causing hangs (José Roberto de Souza) - Disable coarse power gating on some DG2 steppings workaround (Matt Roper) - Add IC cache invalidation workaround on DG2 (Ramalingam C) - Move two Icelake workarounds to the right place (Raviteja Goud Talla) - Fix error pointer dereference in i915_gem_do_execbuffer() (Dan Carpenter) - Fixup a couple of generic and DG2 specific issues in migration code (Matthew Auld) - Fix kernel-doc warnings in i915_drm_object.c (Randy Dunlap) - Drop stealing of bits from i915_sw_fence function pointer (Matthew Brost) - Introduce new macros for i915 PTE (Michael Cheng) - Prep work for engine reset by reset domain lookup (Tejas Upadhyay) - Fixup drm-intel-gt-next build failure (Matthew Auld) - Fix live_engine_busy_stats selftests in GuC mode (Umesh Nerlige Ramappa) - Remove dma_resv_prune (Maarten Lankhorst) - Preserve huge pages enablement after driver reload (Matthew Auld) - Fix a NULL pointer dereference in igt_request_rewind() (selftests) (Zhou Qingyang) - Add workaround numbers to GEN7_COMMON_SLICE_CHICKEN1 whitelisting (José Roberto de Souza) - Increase timeouts in i915_gem_contexts selftests to handle GuC being slower (Bruce Chang) drm-intel-gt-next-2021-11-22: Driver Changes: - Fix media and OpenCL system hangs on Gen9 due a missing workaround (Cooper) - Fix build on non-x86 due missing wbinvd_on_all_cpus (Matthew Auld) - Fix recursive lock in GuC submission (Matthew Brost) - Revert 'guc_id' from i915_request tracepoint (Joonas) - Improve accuracy of engine busyness query with GuC submission (Umesh) - Always flush the scratch page so Bypass-LLC MOCS works correctly (Matthew Auld) - Stop caching the scratch page (Matthew Auld) - Make sure to flush even if async flush unexpectedly fails (Matthew Auld) - Skip flushing when obtaining dmabuf pages on discrete (Matthew Auld) - Implement waitboosting with GuC submission (Vinay) - Failsafe migration blits (Thomas) - Fix per-engine resets with GuC submission (Matthew Brost, Thomas) - Fix error capture in GuC mode (John) - Fix gem_madvise for ttm+shmem objects (Thomas) - Fix illegal addition to shrinker list with the TTM backend (Thomas) - Skip error capture when wedged on init (Tvrtko) - fix NULL vs IS_ERR() checking when creating GuC parallel contexts (Dan) - Drain the ttm delayed workqueue too (Maarten) - Add initial Xe_HP SDV workarounds (Stuart) - Add initial DG2 gt/ctx/engine workarounds and programm HW settings (Matt) - Faster shrinking of cached system memory objects from the TTM backend plus backend prep work (Matthew Auld) - Introduce refcounted sg-tables (Thomas) - Stop using obj->cache_dirty on discrete altogether (Matthew Auld) - Track graphics and media steppings separately in code (José) - Rework some irq functions to take intel_gt as argument (Paulo) - Split general MMIO setup from per-GT uncore init (Daniele) - Prep work work for TTM backend eviction and dma_resv locking (Maarten, Matthew Auld) - Fix some selftests to work with GuC (Matthew Brost) - Fix inconsistent IS_ERR and PTR_ERR (Kai) - Use ERR_CAST instead of ERR_PTR(PTR_ERR()) (Wan) - Remove some dead struct fwd decl from i915_drv.h (Daniel) - Fixup dma_fence_wait usage (Matthew) - Remove gen6_ppgtt_unpin_all (Maarten) - Rework context handling in hugepages selftests (Maarten) The following changes since commit c18c8891111bb5e014e144716044991112f16833: Merge tag 'drm-misc-next-2021-11-18' of git://anongit.freedesktop.org/drm/drm-misc into drm-next (2021-11-23 09:38:55 +1000) are available in the Git repository at: git://anongit.freedesktop.org/drm/drm-intel tags/drm-intel-gt-next-2021-12-09 for you to fetch changes up to 20cddfcc82e642e4682c48af91f0702fbbd623a0: drm/i915/gt: Use hw_engine_masks as reset_domains (2021-12-08 18:27:05 -0500) ---------------------------------------------------------------- Core Changes: - Fix PENDING_ERROR leak in dma_fence_array_signaled() (Thomas Hellström) Driver Changes: - Fix runtime PM handling during PXP suspend (Tejas Upadhyay) - Improve eviction performance on discrete by implementing async TTM moves (Thomas Hellström, Maarten Lankhorst) - Improve robustness of error capture under memory pressure (Thomas Hellström) - Fix GuC PMU versus GPU reset handling (Umesh Nerlige Ramappa) - Use per device iommu check (Tvrtko Ursulin) - Make error capture work with async migration (Thomas Hellström) - Revert incorrect implementation of Wa_1508744258 causing hangs (José Roberto de Souza) - Disable coarse power gating on some DG2 steppings workaround (Matt Roper) - Add IC cache invalidation workaround on DG2 (Ramalingam C) - Move two Icelake workarounds to the right place (Raviteja Goud Talla) - Fix error pointer dereference in i915_gem_do_execbuffer() (Dan Carpenter) - Fixup a couple of generic and DG2 specific issues in migration code (Matthew Auld) - Fix kernel-doc warnings in i915_drm_object.c (Randy Dunlap) - Drop stealing of bits from i915_sw_fence function pointer (Matthew Brost) - Introduce new macros for i915 PTE (Michael Cheng) - Prep work for engine reset by reset domain lookup (Tejas Upadhyay) - Fixup drm-intel-gt-next build failure (Matthew Auld) - Fix live_engine_busy_stats selftests in GuC mode (Umesh Nerlige Ramappa) - Remove dma_resv_prune (Maarten Lankhorst) - Preserve huge pages enablement after driver reload (Matthew Auld) - Fix a NULL pointer dereference in igt_request_rewind() (selftests) (Zhou Qingyang) - Add workaround numbers to GEN7_COMMON_SLICE_CHICKEN1 whitelisting (José Roberto de Souza) - Increase timeouts in i915_gem_contexts selftests to handle GuC being slower (Bruce Chang) ---------------------------------------------------------------- Bruce Chang (1): drm/i915/selftests: Follow up on increase timeout in i915_gem_contexts selftests Cooper Chiou (1): drm/i915: Enable WaProgramMgsrForCorrectSliceSpecificMmioReads for Gen9 Dan Carpenter (3): drm/i915/guc: fix NULL vs IS_ERR() checking drm/i915/ttm: Fix error code in i915_ttm_eviction_valuable() drm/i915: Fix error pointer dereference in i915_gem_do_execbuffer() Daniel Vetter (1): drm/i915: Remove some dead struct fwd decl from i915_drv.h Daniele Ceraolo Spurio (1): drm/i915: split general MMIO setup from per-GT uncore init John Harrison (1): drm/i915/guc: Refcount context during error capture Joonas Lahtinen (3): Merge drm/drm-next into drm-intel-gt-next MAINTAINERS: Add Tvrtko as drm/i915 co-maintainer drm/i915: Revert 'guc_id' from i915_request tracepoint José Roberto de Souza (5): drm/i915: Add struct to hold IP version drm/i915: Track media IP stepping separated from GT drm/i915: Rename GT_STEP to GRAPHICS_STEP Revert "drm/i915: Implement Wa_1508744258" drm/i915: Add workaround numbers to GEN7_COMMON_SLICE_CHICKEN1 whitelisting Kai Song (1): drm/i915/selftests: Fix inconsistent IS_ERR and PTR_ERR Maarten Lankhorst (9): drm/i915: Remove gen6_ppgtt_unpin_all drm/i915/selftests: Rework context handling in hugepages selftests drm/i915: Create a dummy object for gen6 ppgtt drm/i915: Create a full object for mock_ring, v2. drm/i915: vma is always backed by an object. drm/i915: Remove resv from i915_vma drm/i915: Drain the ttm delayed workqueue too drm/i915: Add support for moving fence waiting drm/i915: Remove dma_resv_prune Matt Roper (4): drm/i915/dg2: Add initial gt/ctx/engine workarounds drm/i915/dg2: Program recommended HW settings drm/i915: Don't read query SSEU for non-existent slice 0 on old platforms drm/i915/dg2: Add Wa_16011777198 Matthew Auld (23): drm/i915/dmabuf: fix broken build drm/i915/ttm: add tt shmem backend drm/i915/gtt: drop unneeded make_unshrinkable drm/i915: drop unneeded make_unshrinkable in free_object drm/i915: add some kernel-doc for shrink_pin and friends drm/i915/ttm: move shrinker management into adjust_lru drm/i915/ttm: use cached system pages when evicting lmem drm/i915/ttm: enable shmem tt backend drm/i915/gtt: flush the scratch page drm/i915/gtt: stop caching the scratch page drm/i915/clflush: fixup handling of cache_dirty drm/i915/clflush: disallow on discrete drm/i915: move cpu_write_needs_clflush drm/i915: stop setting cache_dirty on discrete drm/i915/dmabuf: drop the flush on discrete drm/i915: fixup dma_fence_wait usage drm/i915: move the pre_pin earlier drm/i915/ttm: fixup build failure drm/i915/gemfs: don't mark huge_opt as static drm/i915/migrate: don't check the scratch page drm/i915/migrate: fix offset calculation drm/i915/migrate: fix length calculation drm/i915/selftests: handle object rounding Matthew Brost (5): drm/i915/selftests: Increase timeout in requests perf selftest drm/i915/selftests: Update live.evict to wait on requests / idle GPU after each loop drm/i915/guc: Fix recursive lock in GuC submission drm/i915/resets: Don't set / test for per-engine reset bits with GuC submission drm/i915: Drop stealing of bits from i915_sw_fence function pointer Michael Cheng (1): drm/i915: Introduce new macros for i915 PTE Paulo Zanoni (1): drm/i915: rework some irq functions to take intel_gt as argument Ramalingam C (1): drm/i915/dg2: Add Wa_16013000631 Randy Dunlap (1): drm/i915/gem: placate scripts/kernel-doc Raviteja Goud Talla (1): drm/i915/gen11: Moving WAs to icl_gt_workarounds_init() Stuart Summers (1): drm/i915/xehpsdv: Add initial workarounds Tejas Upadhyay (2): drm/i915/gt: Hold RPM wakelock during PXP suspend drm/i915/gt: Use hw_engine_masks as reset_domains Thomas Hellström (16): drm/i915/gem: Break out some shmem backend utils drm/i915: Introduce refcounted sg-tables drm/i915/ttm: Reorganize the ttm move code drm/i915/ttm: Failsafe migration blits drm/i915/gem: Fix gem_madvise for ttm+shmem objects drm/i915/selftests: Use clear_and_wake_up_bit() for the per-engine reset bitlocks drm/i915/ttm: Fix illegal addition to shrinker list drm/i915/ttm: Move the i915_gem_obj_copy_ttm() function drm/i915/ttm: Drop region reference counting drm/i915/ttm: Correctly handle waiting for gpu when shrinking drm/i915/ttm: Implement asynchronous TTM moves drm/i915/ttm: Update i915_gem_obj_copy_ttm() to be asynchronous drm/i915: Avoid allocating a page array for the gpu coredump drm/i915: Use __GFP_KSWAPD_RECLAIM in the capture code dma_fence_array: Fix PENDING_ERROR leak in dma_fence_array_signaled() drm/i915: Update error capture code to avoid using the current vma state Tvrtko Ursulin (5): drm/i915: Skip error capture when wedged on init Merge drm/drm-next into drm-intel-gt-next Revert "drm/i915/dmabuf: fix broken build" Merge drm/drm-next into drm-intel-gt-next drm/i915: Use per device iommu check Umesh Nerlige Ramappa (5): drm/i915/pmu: Add a name to the execlists stats drm/i915/pmu: Connect engine busyness stats from GuC to pmu drm/i915/pmu: Avoid with_intel_runtime_pm within spinlock drm/i915/pmu: Increase the live_engine_busy_stats sample period drm/i915/pmu: Fix synchronization of PMU callback with reset Vinay Belgaumkar (4): drm/i915/guc/slpc: Define and initialize boost frequency drm/i915/guc/slpc: Add waitboost functionality for SLPC drm/i915/guc/slpc: Update boost sysfs hooks for SLPC drm/i915/guc/slpc: Check GuC status before freq boost Wan Jiabing (1): drm/i915: Use ERR_CAST instead of ERR_PTR(PTR_ERR()) Zhou Qingyang (1): drm/i915/gem: Fix a NULL pointer dereference in igt_request_rewind() MAINTAINERS | 1 + drivers/dma-buf/dma-fence-array.c | 6 +- drivers/gpu/drm/i915/Makefile | 3 +- drivers/gpu/drm/i915/display/intel_bw.c | 2 +- drivers/gpu/drm/i915/display/intel_display.c | 4 +- drivers/gpu/drm/i915/display/intel_fbc.c | 2 +- drivers/gpu/drm/i915/dma_resv_utils.c | 17 - drivers/gpu/drm/i915/dma_resv_utils.h | 13 - drivers/gpu/drm/i915/gem/i915_gem_clflush.c | 18 +- drivers/gpu/drm/i915/gem/i915_gem_context.c | 2 +- drivers/gpu/drm/i915/gem/i915_gem_dmabuf.c | 15 +- drivers/gpu/drm/i915/gem/i915_gem_domain.c | 22 + drivers/gpu/drm/i915/gem/i915_gem_execbuffer.c | 142 +++- drivers/gpu/drm/i915/gem/i915_gem_internal.c | 44 +- drivers/gpu/drm/i915/gem/i915_gem_object.c | 75 +- drivers/gpu/drm/i915/gem/i915_gem_object.h | 40 +- drivers/gpu/drm/i915/gem/i915_gem_object_types.h | 46 +- drivers/gpu/drm/i915/gem/i915_gem_pages.c | 18 +- drivers/gpu/drm/i915/gem/i915_gem_region.c | 4 +- drivers/gpu/drm/i915/gem/i915_gem_shmem.c | 195 +++-- drivers/gpu/drm/i915/gem/i915_gem_shrinker.c | 97 ++- drivers/gpu/drm/i915/gem/i915_gem_stolen.c | 8 +- drivers/gpu/drm/i915/gem/i915_gem_ttm.c | 765 +++++++++--------- drivers/gpu/drm/i915/gem/i915_gem_ttm.h | 41 +- drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c | 874 +++++++++++++++++++++ drivers/gpu/drm/i915/gem/i915_gem_ttm_move.h | 41 + drivers/gpu/drm/i915/gem/i915_gem_ttm_pm.c | 3 + drivers/gpu/drm/i915/gem/i915_gem_wait.c | 12 +- drivers/gpu/drm/i915/gem/i915_gemfs.c | 5 +- drivers/gpu/drm/i915/gem/selftests/huge_pages.c | 130 +-- .../gpu/drm/i915/gem/selftests/i915_gem_context.c | 2 +- .../gpu/drm/i915/gem/selftests/i915_gem_dmabuf.c | 4 +- .../gpu/drm/i915/gem/selftests/i915_gem_migrate.c | 24 +- drivers/gpu/drm/i915/gt/gen6_ppgtt.c | 135 ++-- drivers/gpu/drm/i915/gt/gen6_ppgtt.h | 2 - drivers/gpu/drm/i915/gt/gen8_engine_cs.c | 2 +- drivers/gpu/drm/i915/gt/gen8_ppgtt.c | 11 +- drivers/gpu/drm/i915/gt/intel_context.c | 16 +- drivers/gpu/drm/i915/gt/intel_engine_cs.c | 68 +- drivers/gpu/drm/i915/gt/intel_engine_stats.h | 33 +- drivers/gpu/drm/i915/gt/intel_engine_types.h | 84 +- .../gpu/drm/i915/gt/intel_execlists_submission.c | 37 +- drivers/gpu/drm/i915/gt/intel_ggtt.c | 6 +- drivers/gpu/drm/i915/gt/intel_gt_pm.c | 9 +- drivers/gpu/drm/i915/gt/intel_gtt.c | 3 + drivers/gpu/drm/i915/gt/intel_gtt.h | 3 + drivers/gpu/drm/i915/gt/intel_lrc.c | 5 + drivers/gpu/drm/i915/gt/intel_migrate.c | 8 +- drivers/gpu/drm/i915/gt/intel_mocs.c | 2 +- drivers/gpu/drm/i915/gt/intel_rc6.c | 15 +- drivers/gpu/drm/i915/gt/intel_region_lmem.c | 12 +- drivers/gpu/drm/i915/gt/intel_reset.c | 58 +- drivers/gpu/drm/i915/gt/intel_ring_submission.c | 2 +- drivers/gpu/drm/i915/gt/intel_rps.c | 72 ++ drivers/gpu/drm/i915/gt/intel_rps.h | 3 + drivers/gpu/drm/i915/gt/intel_workarounds.c | 502 ++++++++++-- drivers/gpu/drm/i915/gt/mock_engine.c | 38 +- drivers/gpu/drm/i915/gt/selftest_engine_pm.c | 35 +- drivers/gpu/drm/i915/gt/selftest_hangcheck.c | 20 +- drivers/gpu/drm/i915/gt/selftest_migrate.c | 1 + drivers/gpu/drm/i915/gt/uc/abi/guc_actions_abi.h | 1 + drivers/gpu/drm/i915/gt/uc/intel_guc.h | 30 + drivers/gpu/drm/i915/gt/uc/intel_guc_ads.c | 21 + drivers/gpu/drm/i915/gt/uc/intel_guc_ads.h | 5 + drivers/gpu/drm/i915/gt/uc/intel_guc_fwif.h | 13 + drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.c | 155 +++- drivers/gpu/drm/i915/gt/uc/intel_guc_slpc.h | 3 + drivers/gpu/drm/i915/gt/uc/intel_guc_slpc_types.h | 13 + drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c | 290 +++++++ drivers/gpu/drm/i915/gt/uc/intel_guc_submission.h | 2 + drivers/gpu/drm/i915/gvt/gtt.c | 12 +- drivers/gpu/drm/i915/i915_debugfs.c | 1 + drivers/gpu/drm/i915/i915_drv.c | 18 +- drivers/gpu/drm/i915/i915_drv.h | 83 +- drivers/gpu/drm/i915/i915_gem.c | 5 +- drivers/gpu/drm/i915/i915_gpu_error.c | 233 ++++-- drivers/gpu/drm/i915/i915_gpu_error.h | 4 +- drivers/gpu/drm/i915/i915_irq.c | 26 +- drivers/gpu/drm/i915/i915_pci.c | 18 +- drivers/gpu/drm/i915/i915_reg.h | 156 +++- drivers/gpu/drm/i915/i915_request.c | 69 +- drivers/gpu/drm/i915/i915_request.h | 20 +- drivers/gpu/drm/i915/i915_scatterlist.c | 62 +- drivers/gpu/drm/i915/i915_scatterlist.h | 76 +- drivers/gpu/drm/i915/i915_sw_fence.c | 28 +- drivers/gpu/drm/i915/i915_sw_fence.h | 23 +- drivers/gpu/drm/i915/i915_sw_fence_work.c | 2 +- drivers/gpu/drm/i915/i915_sysfs.c | 19 +- drivers/gpu/drm/i915/i915_vma.c | 98 ++- drivers/gpu/drm/i915/i915_vma.h | 9 +- drivers/gpu/drm/i915/i915_vma_snapshot.c | 134 ++++ drivers/gpu/drm/i915/i915_vma_snapshot.h | 112 +++ drivers/gpu/drm/i915/i915_vma_types.h | 1 - drivers/gpu/drm/i915/intel_device_info.c | 33 +- drivers/gpu/drm/i915/intel_device_info.h | 12 +- drivers/gpu/drm/i915/intel_memory_region.c | 26 +- drivers/gpu/drm/i915/intel_memory_region.h | 9 +- drivers/gpu/drm/i915/intel_pm.c | 39 +- drivers/gpu/drm/i915/intel_region_ttm.c | 50 +- drivers/gpu/drm/i915/intel_region_ttm.h | 7 +- drivers/gpu/drm/i915/intel_step.c | 77 +- drivers/gpu/drm/i915/intel_step.h | 3 +- drivers/gpu/drm/i915/intel_uncore.c | 17 +- drivers/gpu/drm/i915/intel_uncore.h | 2 + drivers/gpu/drm/i915/pxp/intel_pxp_pm.c | 37 +- drivers/gpu/drm/i915/pxp/intel_pxp_pm.h | 19 +- drivers/gpu/drm/i915/selftests/i915_gem_evict.c | 19 + drivers/gpu/drm/i915/selftests/i915_request.c | 14 +- drivers/gpu/drm/i915/selftests/i915_sw_fence.c | 2 +- drivers/gpu/drm/i915/selftests/igt_reset.c | 2 +- .../gpu/drm/i915/selftests/intel_memory_region.c | 8 +- drivers/gpu/drm/i915/selftests/lib_sw_fence.c | 8 +- drivers/gpu/drm/i915/selftests/mock_gem_device.c | 4 +- drivers/gpu/drm/i915/selftests/mock_region.c | 19 +- 114 files changed, 4609 insertions(+), 1397 deletions(-) delete mode 100644 drivers/gpu/drm/i915/dma_resv_utils.c delete mode 100644 drivers/gpu/drm/i915/dma_resv_utils.h create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_ttm_move.c create mode 100644 drivers/gpu/drm/i915/gem/i915_gem_ttm_move.h create mode 100644 drivers/gpu/drm/i915/i915_vma_snapshot.c create mode 100644 drivers/gpu/drm/i915/i915_vma_snapshot.h

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dri-devel December 2021