dri-devel April 2021

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317 participants
715 discussions

[PATCH AUTOSEL 5.10 10/22] drm/tegra: dc: Don't set PLL clock to 0Hz
by Sasha Levin 05 Apr '21

05 Apr '21

From: Dmitry Osipenko <digetx(a)gmail.com> [ Upstream commit f8fb97c915954fc6de6513cdf277103b5c6df7b3 ] RGB output doesn't allow to change parent clock rate of the display and PCLK rate is set to 0Hz in this case. The tegra_dc_commit_state() shall not set the display clock to 0Hz since this change propagates to the parent clock. The DISP clock is defined as a NODIV clock by the tegra-clk driver and all NODIV clocks use the CLK_SET_RATE_PARENT flag. This bug stayed unnoticed because by default PLLP is used as the parent clock for the display controller and PLLP silently skips the erroneous 0Hz rate changes because it always has active child clocks that don't permit rate changes. The PLLP isn't acceptable for some devices that we want to upstream (like Samsung Galaxy Tab and ASUS TF700T) due to a display panel clock rate requirements that can't be fulfilled by using PLLP and then the bug pops up in this case since parent clock is set to 0Hz, killing the display output. Don't touch DC clock if pclk=0 in order to fix the problem. Signed-off-by: Dmitry Osipenko <digetx(a)gmail.com> Signed-off-by: Thierry Reding <treding(a)nvidia.com> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- drivers/gpu/drm/tegra/dc.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index b2c8c68b7e26..626d3cb2a915 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -1688,6 +1688,11 @@ static void tegra_dc_commit_state(struct tegra_dc *dc, dev_err(dc->dev, "failed to set clock rate to %lu Hz\n", state->pclk); + + err = clk_set_rate(dc->clk, state->pclk); + if (err < 0) + dev_err(dc->dev, "failed to set clock %pC to %lu Hz: %d\n", + dc->clk, state->pclk, err); } DRM_DEBUG_KMS("rate: %lu, div: %u\n", clk_get_rate(dc->clk), @@ -1698,11 +1703,6 @@ static void tegra_dc_commit_state(struct tegra_dc *dc, value = SHIFT_CLK_DIVIDER(state->div) | PIXEL_CLK_DIVIDER_PCD1; tegra_dc_writel(dc, value, DC_DISP_DISP_CLOCK_CONTROL); } - - err = clk_set_rate(dc->clk, state->pclk); - if (err < 0) - dev_err(dc->dev, "failed to set clock %pC to %lu Hz: %d\n", - dc->clk, state->pclk, err); } static void tegra_dc_stop(struct tegra_dc *dc) -- 2.30.2

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[PATCH AUTOSEL 5.10 05/22] drm/imx: imx-ldb: fix out of bounds array access warning
by Sasha Levin 05 Apr '21

05 Apr '21

From: Arnd Bergmann <arnd(a)arndb.de> [ Upstream commit 33ce7f2f95cabb5834cf0906308a5cb6103976da ] When CONFIG_OF is disabled, building with 'make W=1' produces warnings about out of bounds array access: drivers/gpu/drm/imx/imx-ldb.c: In function 'imx_ldb_set_clock.constprop': drivers/gpu/drm/imx/imx-ldb.c:186:8: error: array subscript -22 is below array bounds of 'struct clk *[4]' [-Werror=array-bounds] Add an error check before the index is used, which helps with the warning, as well as any possible other error condition that may be triggered at runtime. The warning could be fixed by adding a Kconfig depedency on CONFIG_OF, but Liu Ying points out that the driver may hit the out-of-bounds problem at runtime anyway. Signed-off-by: Arnd Bergmann <arnd(a)arndb.de> Reviewed-by: Liu Ying <victor.liu(a)nxp.com> Signed-off-by: Philipp Zabel <p.zabel(a)pengutronix.de> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- drivers/gpu/drm/imx/imx-ldb.c | 10 ++++++++++ 1 file changed, 10 insertions(+) diff --git a/drivers/gpu/drm/imx/imx-ldb.c b/drivers/gpu/drm/imx/imx-ldb.c index 41e2978cb1eb..75036aaa0c63 100644 --- a/drivers/gpu/drm/imx/imx-ldb.c +++ b/drivers/gpu/drm/imx/imx-ldb.c @@ -190,6 +190,11 @@ static void imx_ldb_encoder_enable(struct drm_encoder *encoder) int dual = ldb->ldb_ctrl & LDB_SPLIT_MODE_EN; int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder); + if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) { + dev_warn(ldb->dev, "%s: invalid mux %d\n", __func__, mux); + return; + } + drm_panel_prepare(imx_ldb_ch->panel); if (dual) { @@ -248,6 +253,11 @@ imx_ldb_encoder_atomic_mode_set(struct drm_encoder *encoder, int mux = drm_of_encoder_active_port_id(imx_ldb_ch->child, encoder); u32 bus_format = imx_ldb_ch->bus_format; + if (mux < 0 || mux >= ARRAY_SIZE(ldb->clk_sel)) { + dev_warn(ldb->dev, "%s: invalid mux %d\n", __func__, mux); + return; + } + if (mode->clock > 170000) { dev_warn(ldb->dev, "%s: mode exceeds 170 MHz pixel clock\n", __func__); -- 2.30.2

1 0

[PATCH AUTOSEL 5.11 11/22] gpu: host1x: Use different lock classes for each client
by Sasha Levin 05 Apr '21

05 Apr '21

From: Mikko Perttunen <mperttunen(a)nvidia.com> [ Upstream commit a24f98176d1efae2c37d3438c57a624d530d9c33 ] To avoid false lockdep warnings, give each client lock a different lock class, passed from the initialization site by macro. Signed-off-by: Mikko Perttunen <mperttunen(a)nvidia.com> Signed-off-by: Thierry Reding <treding(a)nvidia.com> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- drivers/gpu/host1x/bus.c | 10 ++++++---- include/linux/host1x.h | 9 ++++++++- 2 files changed, 14 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/host1x/bus.c b/drivers/gpu/host1x/bus.c index 347fb962b6c9..68a766ff0e9d 100644 --- a/drivers/gpu/host1x/bus.c +++ b/drivers/gpu/host1x/bus.c @@ -705,8 +705,9 @@ void host1x_driver_unregister(struct host1x_driver *driver) EXPORT_SYMBOL(host1x_driver_unregister); /** - * host1x_client_register() - register a host1x client + * __host1x_client_register() - register a host1x client * @client: host1x client + * @key: lock class key for the client-specific mutex * * Registers a host1x client with each host1x controller instance. Note that * each client will only match their parent host1x controller and will only be @@ -715,13 +716,14 @@ EXPORT_SYMBOL(host1x_driver_unregister); * device and call host1x_device_init(), which will in turn call each client's * &host1x_client_ops.init implementation. */ -int host1x_client_register(struct host1x_client *client) +int __host1x_client_register(struct host1x_client *client, + struct lock_class_key *key) { struct host1x *host1x; int err; INIT_LIST_HEAD(&client->list); - mutex_init(&client->lock); + __mutex_init(&client->lock, "host1x client lock", key); client->usecount = 0; mutex_lock(&devices_lock); @@ -742,7 +744,7 @@ int host1x_client_register(struct host1x_client *client) return 0; } -EXPORT_SYMBOL(host1x_client_register); +EXPORT_SYMBOL(__host1x_client_register); /** * host1x_client_unregister() - unregister a host1x client diff --git a/include/linux/host1x.h b/include/linux/host1x.h index ce59a6a6a008..9eb77c87a83b 100644 --- a/include/linux/host1x.h +++ b/include/linux/host1x.h @@ -320,7 +320,14 @@ static inline struct host1x_device *to_host1x_device(struct device *dev) int host1x_device_init(struct host1x_device *device); int host1x_device_exit(struct host1x_device *device); -int host1x_client_register(struct host1x_client *client); +int __host1x_client_register(struct host1x_client *client, + struct lock_class_key *key); +#define host1x_client_register(class) \ + ({ \ + static struct lock_class_key __key; \ + __host1x_client_register(class, &__key); \ + }) + int host1x_client_unregister(struct host1x_client *client); int host1x_client_suspend(struct host1x_client *client); -- 2.30.2

1 0

[PATCH AUTOSEL 5.11 10/22] drm/tegra: dc: Don't set PLL clock to 0Hz
by Sasha Levin 05 Apr '21

05 Apr '21

From: Dmitry Osipenko <digetx(a)gmail.com> [ Upstream commit f8fb97c915954fc6de6513cdf277103b5c6df7b3 ] RGB output doesn't allow to change parent clock rate of the display and PCLK rate is set to 0Hz in this case. The tegra_dc_commit_state() shall not set the display clock to 0Hz since this change propagates to the parent clock. The DISP clock is defined as a NODIV clock by the tegra-clk driver and all NODIV clocks use the CLK_SET_RATE_PARENT flag. This bug stayed unnoticed because by default PLLP is used as the parent clock for the display controller and PLLP silently skips the erroneous 0Hz rate changes because it always has active child clocks that don't permit rate changes. The PLLP isn't acceptable for some devices that we want to upstream (like Samsung Galaxy Tab and ASUS TF700T) due to a display panel clock rate requirements that can't be fulfilled by using PLLP and then the bug pops up in this case since parent clock is set to 0Hz, killing the display output. Don't touch DC clock if pclk=0 in order to fix the problem. Signed-off-by: Dmitry Osipenko <digetx(a)gmail.com> Signed-off-by: Thierry Reding <treding(a)nvidia.com> Signed-off-by: Sasha Levin <sashal(a)kernel.org> --- drivers/gpu/drm/tegra/dc.c | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/tegra/dc.c b/drivers/gpu/drm/tegra/dc.c index 0ae3a025efe9..24362533e14c 100644 --- a/drivers/gpu/drm/tegra/dc.c +++ b/drivers/gpu/drm/tegra/dc.c @@ -1688,6 +1688,11 @@ static void tegra_dc_commit_state(struct tegra_dc *dc, dev_err(dc->dev, "failed to set clock rate to %lu Hz\n", state->pclk); + + err = clk_set_rate(dc->clk, state->pclk); + if (err < 0) + dev_err(dc->dev, "failed to set clock %pC to %lu Hz: %d\n", + dc->clk, state->pclk, err); } DRM_DEBUG_KMS("rate: %lu, div: %u\n", clk_get_rate(dc->clk), @@ -1698,11 +1703,6 @@ static void tegra_dc_commit_state(struct tegra_dc *dc, value = SHIFT_CLK_DIVIDER(state->div) | PIXEL_CLK_DIVIDER_PCD1; tegra_dc_writel(dc, value, DC_DISP_DISP_CLOCK_CONTROL); } - - err = clk_set_rate(dc->clk, state->pclk); - if (err < 0) - dev_err(dc->dev, "failed to set clock %pC to %lu Hz: %d\n", - dc->clk, state->pclk, err); } static void tegra_dc_stop(struct tegra_dc *dc) -- 2.30.2

1 0

[PATCH AUTOSEL 5.11 05/22] drm/imx: imx-ldb: fix out of bounds array access warning
by Sasha Levin 05 Apr '21

05 Apr '21

1 0

[PATCH 1/2] drm/msm/a6xx: Fix perfcounter oob timeout
by Akhil P Oommen 05 Apr '21

05 Apr '21

We were not programing the correct bit while clearing the perfcounter oob. So, clear it correctly using the new 'clear' bit. This fixes the below error: [drm:a6xx_gmu_set_oob] *ERROR* Timeout waiting for GMU OOB set PERFCOUNTER: 0x80000000 Signed-off-by: Akhil P Oommen <akhilpo(a)codeaurora.org> --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 12 +++++++++--- 1 file changed, 9 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index 863047b..6a86cd0 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -246,7 +246,7 @@ static int a6xx_gmu_hfi_start(struct a6xx_gmu *gmu) } struct a6xx_gmu_oob_bits { - int set, ack, set_new, ack_new; + int set, ack, set_new, ack_new, clear, clear_new; const char *name; }; @@ -260,6 +260,8 @@ static const struct a6xx_gmu_oob_bits a6xx_gmu_oob_bits[] = { .ack = 24, .set_new = 30, .ack_new = 31, + .clear = 24, + .clear_new = 31, }, [GMU_OOB_PERFCOUNTER_SET] = { @@ -268,18 +270,22 @@ static const struct a6xx_gmu_oob_bits a6xx_gmu_oob_bits[] = { .ack = 25, .set_new = 28, .ack_new = 30, + .clear = 25, + .clear_new = 29, }, [GMU_OOB_BOOT_SLUMBER] = { .name = "BOOT_SLUMBER", .set = 22, .ack = 30, + .clear = 30, }, [GMU_OOB_DCVS_SET] = { .name = "GPU_DCVS", .set = 23, .ack = 31, + .clear = 31, }, }; @@ -335,9 +341,9 @@ void a6xx_gmu_clear_oob(struct a6xx_gmu *gmu, enum a6xx_gmu_oob_state state) return; if (gmu->legacy) - bit = a6xx_gmu_oob_bits[state].ack; + bit = a6xx_gmu_oob_bits[state].clear; else - bit = a6xx_gmu_oob_bits[state].ack_new; + bit = a6xx_gmu_oob_bits[state].clear_new; gmu_write(gmu, REG_A6XX_GMU_HOST2GMU_INTR_SET, 1 << bit); } -- 2.7.4

1 1

[GIT PULL] mediatek drm next for 5.13
by Chun-Kuang Hu 05 Apr '21

05 Apr '21

Hi, Dave & Daniel: This includes: 1. Fine tune the line time for EOTp. 2. Add support mt8192 dpi. 3. Make crtc config-updating atomic. 4. Don't support hdmi connector creation. Regards, Chun-Kuang. The following changes since commit a38fd8748464831584a19438cbb3082b5a2dab15: Linux 5.12-rc2 (2021-03-05 17:33:41 -0800) are available in the Git repository at: https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux.git tags/mediatek-drm-next-5.13 for you to fetch changes up to 2e477391522354e763aa62ee3e281c1ad9e8eb1b: drm/mediatek: Don't support hdmi connector creation (2021-04-01 22:05:20 +0800) ---------------------------------------------------------------- Mediatek DRM Next for Linux 5.13 1. Fine tune the line time for EOTp. 2. Add support mt8192 dpi. 3. Make crtc config-updating atomic. 4. Don't support hdmi connector creation. ---------------------------------------------------------------- Boris Brezillon (1): drm/mediatek: Add missing MODULE_DEVICE_TABLE() Chun-Kuang Hu (1): drm/mediatek: crtc: Make config-updating atomic Dafna Hirschfeld (3): MAINTAINERS: Add linux-mediatek ML for drm Mediatek drivers drm/mediatek: Switch the hdmi bridge ops to the atomic versions drm/mediatek: Don't support hdmi connector creation Jitao Shi (3): drm/mediatek: dsi: Use symbolized register definition drm/mediatek: dsi: Fine tune the line time caused by EOTp dt-bindings: mediatek,dpi: add mt8192 to mediatek,dpi Rex-BC Chen (2): drm/mediatek: dpi: Add check for max clock rate in mode_valid drm/mediatek: dpi: Add config for mt8192 Rob Herring (1): dt-bindings: display: mediatek, dpi: Convert to use graph schema Wang Qing (1): drm/mediatek: dpi: Delete redundant printing of return value tangchunyou (1): drm/mediatek: cec: Delete redundant printing of return value .../bindings/display/mediatek/mediatek,dpi.yaml | 12 +- MAINTAINERS | 1 + drivers/gpu/drm/mediatek/mtk_cec.c | 6 +- drivers/gpu/drm/mediatek/mtk_dpi.c | 32 +++- drivers/gpu/drm/mediatek/mtk_drm_crtc.c | 19 ++- drivers/gpu/drm/mediatek/mtk_drm_drv.c | 1 + drivers/gpu/drm/mediatek/mtk_dsi.c | 9 +- drivers/gpu/drm/mediatek/mtk_hdmi.c | 175 +++++++++------------ drivers/gpu/drm/mediatek/mtk_hdmi_ddc.c | 1 + 9 files changed, 130 insertions(+), 126 deletions(-)

1 0

[PATCH] drm/msm: move to use request_irq by IRQF_NO_AUTOEN flag
by Tian Tao 05 Apr '21

05 Apr '21

disable_irq() after request_irq() still has a time gap in which interrupts can come. request_irq() with IRQF_NO_AUTOEN flag will disable IRQ auto-enable because of requesting. this patch is based on "cbe16f35bee68 genirq: Add IRQF_NO_AUTOEN for request_irq/nmi()" which was being merged. Signed-off-by: Tian Tao <tiantao6(a)hisilicon.com> --- drivers/gpu/drm/msm/adreno/a6xx_gmu.c | 5 ++--- drivers/gpu/drm/msm/dp/dp_display.c | 4 ++-- 2 files changed, 4 insertions(+), 5 deletions(-) diff --git a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c index 71c917f..126c23d 100644 --- a/drivers/gpu/drm/msm/adreno/a6xx_gmu.c +++ b/drivers/gpu/drm/msm/adreno/a6xx_gmu.c @@ -1405,15 +1405,14 @@ static int a6xx_gmu_get_irq(struct a6xx_gmu *gmu, struct platform_device *pdev, irq = platform_get_irq_byname(pdev, name); - ret = request_irq(irq, handler, IRQF_TRIGGER_HIGH, name, gmu); + ret = request_irq(irq, handler, IRQF_TRIGGER_HIGH | IRQF_NO_AUTOEN, + name, gmu); if (ret) { DRM_DEV_ERROR(&pdev->dev, "Unable to get interrupt %s %d\n", name, ret); return ret; } - disable_irq(irq); - return irq; } diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index 5a39da6..75ef10e 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -1183,13 +1183,13 @@ int dp_display_request_irq(struct msm_dp *dp_display) rc = devm_request_irq(&dp->pdev->dev, dp->irq, dp_display_irq_handler, - IRQF_TRIGGER_HIGH, "dp_display_isr", dp); + IRQF_TRIGGER_HIGH | IRQF_NO_AUTOEN, + "dp_display_isr", dp); if (rc < 0) { DRM_ERROR("failed to request IRQ%u: %d\n", dp->irq, rc); return rc; } - disable_irq(dp->irq); return 0; } -- 2.7.4

1 0

[PATCH V3 0/2] Add virtual hardware module
by Sumera Priyadarsini 04 Apr '21

04 Apr '21

This patchset adds support for emulating virtual hardware with VKMS. The virtual hardware mode can be enabled by using the following command while loading the module: sudo modprobe vkms enable_virtual_hw=1 The first patch is prep work for adding virtual_hw mode and refactors the plane composition in vkms by adding a helper function vkms_composer_common() which can be used for both vblank mode and virtual mode. The second patch adds virtual hardware support as a module option. The second patch adds new atomic helper functions for the virtual mode and modifies the existing atomic helpers for usage by the vblank mode This gives us two sets of drm_crtc_helper_funcs struct for both modes, making the code flow cleaner and easier to debug. This patchset has been tested with the igt tests, kms_writeback, kms_atomic, kms_lease, kms_flip, kms_pipe_get_crc and preserves results except for subtests related to crc reads and skips tests that rely on vertical blanking. This patchset must be tested after incorporating the igt-tests patch: https://lists.freedesktop.org/archives/igt-dev/2021-February/029355.html Sumera Priyadarsini (2): drm/vkms: Refactor vkms_composer_worker() to prep for virtual_hw mode drm/vkms: Add support for virtual hardware mode drivers/gpu/drm/vkms/vkms_composer.c | 88 +++++++++++++++++----------- drivers/gpu/drm/vkms/vkms_crtc.c | 51 +++++++++++----- drivers/gpu/drm/vkms/vkms_drv.c | 18 ++++-- drivers/gpu/drm/vkms/vkms_drv.h | 4 ++ 4 files changed, 109 insertions(+), 52 deletions(-) -- 2.25.1

2 4

[PATCH] drm: sysfs: convert sysfs snprintf to sysfs_emit
by Carlis 04 Apr '21

04 Apr '21

From: Xuezhi Zhang <zhangxuezhi1(a)yulong.com> Fix the following coccicheck warning: drivers/gpu/drm/drm_sysfs.c:172:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/drm_sysfs.c:185:8-16: WARNING: use scnprintf or sprintf drivers/gpu/drm/drm_sysfs.c:159:8-16: WARNING: use scnprintf or sprintf Signed-off-by: Xuezhi Zhang <zhangxuezhi1(a)yulong.com> --- drivers/gpu/drm/drm_sysfs.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/drm_sysfs.c b/drivers/gpu/drm/drm_sysfs.c index f0336c804..13142fd9d 100644 --- a/drivers/gpu/drm/drm_sysfs.c +++ b/drivers/gpu/drm/drm_sysfs.c @@ -156,7 +156,7 @@ static ssize_t status_show(struct device *device, status = READ_ONCE(connector->status); - return snprintf(buf, PAGE_SIZE, "%s\n", + return sysfs_emit(buf, "%s\n", drm_get_connector_status_name(status)); } @@ -169,7 +169,7 @@ static ssize_t dpms_show(struct device *device, dpms = READ_ONCE(connector->dpms); - return snprintf(buf, PAGE_SIZE, "%s\n", + return sysfs_emit(buf, "%s\n", drm_get_dpms_name(dpms)); } @@ -182,7 +182,7 @@ static ssize_t enabled_show(struct device *device, enabled = READ_ONCE(connector->encoder); - return snprintf(buf, PAGE_SIZE, enabled ? "enabled\n" : "disabled\n"); + return sysfs_emit(buf, enabled ? "enabled\n" : "disabled\n"); } static ssize_t edid_show(struct file *filp, struct kobject *kobj, -- 2.25.1

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dri-devel April 2021