dri-devel August 2021

dri-devel@lists.freedesktop.org

324 participants
762 discussions

[PATCH v3] drm/msm: Remove initialization of static variables
by zhaoxiao 10 Aug '21

10 Aug '21

Address the following checkpatch errors: ERROR: do not initialise statics to false FILE: :drivers/gpu/drm/msm/msm_drv.c:21: -static bool reglog = false; FILE: :drivers/gpu/drm/msm/msm_drv.c:31: -bool dumpstate = false; Signed-off-by: zhaoxiao <zhaoxiao(a)uniontech.com> --- v3: Subject should start out with drm/msm, not drm/drv drivers/gpu/drm/msm/msm_drv.c | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/drivers/gpu/drm/msm/msm_drv.c b/drivers/gpu/drm/msm/msm_drv.c index 9b8fa2ad0d84..d9ca4bc9620b 100644 --- a/drivers/gpu/drm/msm/msm_drv.c +++ b/drivers/gpu/drm/msm/msm_drv.c @@ -59,7 +59,7 @@ static const struct drm_mode_config_helper_funcs mode_config_helper_funcs = { }; #ifdef CONFIG_DRM_MSM_REGISTER_LOGGING -static bool reglog = false; +static bool reglog; MODULE_PARM_DESC(reglog, "Enable register read/write logging"); module_param(reglog, bool, 0600); #else @@ -76,7 +76,7 @@ static char *vram = "16m"; MODULE_PARM_DESC(vram, "Configure VRAM size (for devices without IOMMU/GPUMMU)"); module_param(vram, charp, 0); -bool dumpstate = false; +bool dumpstate; MODULE_PARM_DESC(dumpstate, "Dump KMS state on errors"); module_param(dumpstate, bool, 0600); -- 2.20.1

1 0

[PATCH 0/3] Clean up some CI failures for GuC submission
by Matthew Brost 10 Aug '21

10 Aug '21

Address CI failure related to reset [1]. In addition to the public CI failure we also fix several issues uncovered recenting in our internal CI related to resets. Patch #1 address all of these issues. Workaround an existing memory corruption, in gt_lrc selftest, exposed by enabling GuC submission [2]. Lastly, add a selftest to give us confidence in some of the reset code that is rather hard / intermittent to exercise via IGTs. Signed-off-by: Matthew Brost <matthew.brost(a)intel.com> [1] https://intel-gfx-ci.01.org/tree/drm-tip/CI_DRM_10456/fi-rkl-guc/igt@i915_s… [2] https://intel-gfx-ci.01.org/tree/drm-tip/Patchwork_20772/fi-rkl-guc/igt@i91… Matthew Brost (3): drm/i915/guc: Fix several issues related to resets / request cancelation drm/i915/selftests: Fix memory corruption in live_lrc_isolation drm/i915/selftests: Add initial GuC selftest for scrubbing lost G2H drivers/gpu/drm/i915/gt/intel_context_types.h | 4 + drivers/gpu/drm/i915/gt/selftest_lrc.c | 29 +++- .../gpu/drm/i915/gt/uc/intel_guc_submission.c | 61 ++++++--- drivers/gpu/drm/i915/gt/uc/selftest_guc.c | 126 ++++++++++++++++++ .../drm/i915/selftests/i915_live_selftests.h | 1 + .../i915/selftests/intel_scheduler_helpers.c | 12 ++ .../i915/selftests/intel_scheduler_helpers.h | 2 + 7 files changed, 218 insertions(+), 17 deletions(-) create mode 100644 drivers/gpu/drm/i915/gt/uc/selftest_guc.c -- 2.28.0

2 12

[PATCH] dma-buf: Fix a few typos in dma-buf documentation
by Gal Pressman 10 Aug '21

10 Aug '21

Fix a few typos in the documentation: - Remove an extraneous 'or' - 'unpins' -> 'unpin' - 'braket' -> 'bracket' - 'mappinsg' -> 'mappings' - 'fullfills' -> 'fulfills' Signed-off-by: Gal Pressman <galpress(a)amazon.com> --- include/linux/dma-buf.h | 10 +++++----- 1 file changed, 5 insertions(+), 5 deletions(-) diff --git a/include/linux/dma-buf.h b/include/linux/dma-buf.h index efdc56b9d95f..772403352767 100644 --- a/include/linux/dma-buf.h +++ b/include/linux/dma-buf.h @@ -54,7 +54,7 @@ struct dma_buf_ops { * device), and otherwise need to fail the attach operation. * * The exporter should also in general check whether the current - * allocation fullfills the DMA constraints of the new device. If this + * allocation fulfills the DMA constraints of the new device. If this * is not the case, and the allocation cannot be moved, it should also * fail the attach operation. * @@ -146,7 +146,7 @@ struct dma_buf_ops { * * Returns: * - * A &sg_table scatter list of or the backing storage of the DMA buffer, + * A &sg_table scatter list of the backing storage of the DMA buffer, * already mapped into the device address space of the &device attached * with the provided &dma_buf_attachment. The addresses and lengths in * the scatter list are PAGE_SIZE aligned. @@ -168,7 +168,7 @@ struct dma_buf_ops { * * This is called by dma_buf_unmap_attachment() and should unmap and * release the &sg_table allocated in @map_dma_buf, and it is mandatory. - * For static dma_buf handling this might also unpins the backing + * For static dma_buf handling this might also unpin the backing * storage if this is the last mapping of the DMA buffer. */ void (*unmap_dma_buf)(struct dma_buf_attachment *, @@ -237,7 +237,7 @@ struct dma_buf_ops { * This callback is used by the dma_buf_mmap() function * * Note that the mapping needs to be incoherent, userspace is expected - * to braket CPU access using the DMA_BUF_IOCTL_SYNC interface. + * to bracket CPU access using the DMA_BUF_IOCTL_SYNC interface. * * Because dma-buf buffers have invariant size over their lifetime, the * dma-buf core checks whether a vma is too large and rejects such @@ -464,7 +464,7 @@ static inline bool dma_buf_is_dynamic(struct dma_buf *dmabuf) /** * dma_buf_attachment_is_dynamic - check if a DMA-buf attachment uses dynamic - * mappinsg + * mappings * @attach: the DMA-buf attachment to check * * Returns true if a DMA-buf importer wants to call the map/unmap functions with -- 2.32.0

3 2

[PATCH v2 0/3] seperate panel power control from panel prepare/unprepare
by Jitao Shi 10 Aug '21

10 Aug '21

Changes since v1: - Fix null point when dsi next bridge isn't a panel. - "dsi mmsys reset" is implement by https://patchwork.kernel.org/project/linux-mediatek/list/?series=515355 Jitao Shi (3): drm/panel: seperate panel power control from panel prepare/unprepare drm/panel: boe-tv101wum-n16 seperate the panel power control drm/mediatek: fine tune the dsi panel's power sequence drivers/gpu/drm/bridge/panel.c | 17 +++++ drivers/gpu/drm/drm_panel.c | 38 ++++++++++ drivers/gpu/drm/mediatek/mtk_dsi.c | 29 ++++++-- .../gpu/drm/panel/panel-boe-tv101wum-nl6.c | 72 +++++++++++++------ include/drm/drm_bridge.h | 2 + include/drm/drm_panel.h | 17 +++++ 6 files changed, 148 insertions(+), 27 deletions(-) -- 2.25.1

2 4

[PATCH] drm/i915: Release ctx->syncobj on final put, not on ctx close
by Daniel Vetter 10 Aug '21

10 Aug '21

gem context refcounting is another exercise in least locking design it seems, where most things get destroyed upon context closure (which can race with anything really). Only the actual memory allocation and the locks survive while holding a reference. This tripped up Jason when reimplementing the single timeline feature in commit 00dae4d3d35d4f526929633b76e00b0ab4d3970d Author: Jason Ekstrand <jason(a)jlekstrand.net> Date: Thu Jul 8 10:48:12 2021 -0500 drm/i915: Implement SINGLE_TIMELINE with a syncobj (v4) We could fix the bug by holding ctx->mutex, but it's cleaner to just make the context object actually invariant over its _entire_ lifetime. Signed-off-by: Daniel Vetter <daniel.vetter(a)intel.com> Fixes: 00dae4d3d35d ("drm/i915: Implement SINGLE_TIMELINE with a syncobj (v4)") Cc: Jason Ekstrand <jason(a)jlekstrand.net> Cc: Chris Wilson <chris(a)chris-wilson.co.uk> Cc: Tvrtko Ursulin <tvrtko.ursulin(a)intel.com> Cc: Joonas Lahtinen <joonas.lahtinen(a)linux.intel.com> Cc: Matthew Brost <matthew.brost(a)intel.com> Cc: Matthew Auld <matthew.auld(a)intel.com> Cc: Maarten Lankhorst <maarten.lankhorst(a)linux.intel.com> Cc: "Thomas Hellström" <thomas.hellstrom(a)intel.com> Cc: Lionel Landwerlin <lionel.g.landwerlin(a)intel.com> Cc: Dave Airlie <airlied(a)redhat.com> --- drivers/gpu/drm/i915/gem/i915_gem_context.c | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/drivers/gpu/drm/i915/gem/i915_gem_context.c b/drivers/gpu/drm/i915/gem/i915_gem_context.c index 754b9b8d4981..93ba0197d70a 100644 --- a/drivers/gpu/drm/i915/gem/i915_gem_context.c +++ b/drivers/gpu/drm/i915/gem/i915_gem_context.c @@ -940,6 +940,9 @@ void i915_gem_context_release(struct kref *ref) trace_i915_context_free(ctx); GEM_BUG_ON(!i915_gem_context_is_closed(ctx)); + if (ctx->syncobj) + drm_syncobj_put(ctx->syncobj); + mutex_destroy(&ctx->engines_mutex); mutex_destroy(&ctx->lut_mutex); @@ -1159,9 +1162,6 @@ static void context_close(struct i915_gem_context *ctx) if (vm) i915_vm_close(vm); - if (ctx->syncobj) - drm_syncobj_put(ctx->syncobj); - ctx->file_priv = ERR_PTR(-EBADF); /* -- 2.32.0

3 3

[PATCH 0/3] iommu/drm/msm: Allow non-coherent masters to use system cache
by Sai Prakash Ranjan 10 Aug '21

10 Aug '21

commit ecd7274fb4cd ("iommu: Remove unused IOMMU_SYS_CACHE_ONLY flag") removed unused IOMMU_SYS_CACHE_ONLY prot flag and along with it went the memory type setting required for the non-coherent masters to use system cache. Now that system cache support for GPU is added, we will need to set the right PTE attribute for GPU buffers to be sys cached. Without this, the system cache lines are not allocated for GPU. So the patches in this series introduces a new prot flag IOMMU_LLC, renames IO_PGTABLE_QUIRK_ARM_OUTER_WBWA to IO_PGTABLE_QUIRK_PTW_LLC and makes GPU the user of this protection flag. The series slightly depends on following 2 patches posted earlier and is based on msm-next branch: * https://lore.kernel.org/patchwork/patch/1363008/ * https://lore.kernel.org/patchwork/patch/1363010/ Sai Prakash Ranjan (3): iommu/io-pgtable: Rename last-level cache quirk to IO_PGTABLE_QUIRK_PTW_LLC iommu/io-pgtable-arm: Add IOMMU_LLC page protection flag drm/msm: Use IOMMU_LLC page protection flag to map gpu buffers drivers/gpu/drm/msm/adreno/a6xx_gpu.c | 3 +++ drivers/gpu/drm/msm/adreno/adreno_gpu.c | 2 +- drivers/gpu/drm/msm/msm_iommu.c | 3 +++ drivers/gpu/drm/msm/msm_mmu.h | 4 ++++ drivers/iommu/io-pgtable-arm.c | 9 ++++++--- include/linux/io-pgtable.h | 6 +++--- include/linux/iommu.h | 6 ++++++ 7 files changed, 26 insertions(+), 7 deletions(-) base-commit: 00fd44a1a4700718d5d962432b55c09820f7e709 -- QUALCOMM INDIA, on behalf of Qualcomm Innovation Center, Inc. is a member of Code Aurora Forum, hosted by The Linux Foundation

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[PATCH v2 0/8] MIPS: jz4780 HDMI
by H. Nikolaus Schaller 10 Aug '21

10 Aug '21

This series adds HDMI support for JZ4780 and CI20 board V2: - code and commit messages revisited for checkpatch warnings - rebased on v5.14-rc4 - include (failed, hence RFC 8/8) attempt to convert to component framework (was suggested by Paul Cercueil <paul(a)crapouillou.net> a while ago) H. Nikolaus Schaller (2): MIPS: CI20: defconfig: configure for DRM_DW_HDMI_JZ4780 [RFC] drm/ingenic: convert to component framework for jz4780 hdmi Paul Boddie (5): drm/bridge: synopsis: Add mode_fixup and bridge timings support drm/ingenic: Add jz4780 Synopsys HDMI driver drm/ingenic: Add support for JZ4780 and HDMI output MIPS: DTS: jz4780: account for Synopsys HDMI driver and LCD controller MIPS: DTS: CI20: add HDMI setup Sam Ravnborg (1): dt-bindings: display: Add ingenic-jz4780-hdmi DT Schema .../bindings/display/ingenic-jz4780-hdmi.yaml | 82 +++++++++ arch/mips/boot/dts/ingenic/ci20.dts | 64 +++++++ arch/mips/boot/dts/ingenic/jz4780.dtsi | 45 +++++ arch/mips/configs/ci20_defconfig | 7 + drivers/gpu/drm/bridge/synopsys/dw-hdmi.c | 16 ++ drivers/gpu/drm/ingenic/Kconfig | 9 + drivers/gpu/drm/ingenic/Makefile | 1 + drivers/gpu/drm/ingenic/ingenic-drm-drv.c | 163 ++++++++++++++++-- drivers/gpu/drm/ingenic/ingenic-drm.h | 52 ++++++ drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c | 156 +++++++++++++++++ include/drm/bridge/dw_hdmi.h | 5 + 11 files changed, 585 insertions(+), 15 deletions(-) create mode 100644 Documentation/devicetree/bindings/display/ingenic-jz4780-hdmi.yaml create mode 100644 drivers/gpu/drm/ingenic/ingenic-dw-hdmi.c -- 2.31.1

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[BUG] drm/amdgpu: possible null-pointer dereference in dce_vXX_0_afmt_setmode()
by Tuo Li 10 Aug '21

10 Aug '21

Hello, Our static analysis tool finds some possible null-pointer dereferences in the amdgpu driver in Linux 5.14.0-rc3: In dce_v10_0.c: The variable encoder->crtc is checked in: 1591: if (encoder->crtc) This indicates that encoder->crtc can be NULL. Then the function dce_v10_0_audio_set_dto() is called with the argument encoder: 1600: ce_v10_0_audio_set_dto(encoder, mode->clock); However, encoder->crtc is dereferenced in this function: 1545: struct amdgpu_crtc *amdgpu_crtc = to_amdgpu_crtc(encoder->crtc); 1559: tmp = REG_SET_FIELD(tmp, DCCG_AUDIO_DTO_SOURCE, DCCG_AUDIO_DTO0_SOURCE_SEL, amdgpu_crtc->crtc_id); In dce_v11_0.c and dce_v8_0.c, situations are the same. I am not quite sure whether these possible null-pointer dereferences are real and how to fix them if they are real. Any feedback would be appreciated, thanks! Reported-by: TOTE Robot <oslab(a)tsinghua.edu.cn> Best wishes, Tuo Li

1 0

[PATCH v8, 0/2] soc: mediatek: mmsys: add mt8192 mmsys support
by Yongqiang Niu 10 Aug '21

10 Aug '21

base v5.14-rc1 Yongqiang Niu (2): soc: mediatek: mmsys: add comp OVL_2L2/POSTMASK/RDMA4 soc: mediatek: mmsys: Add mt8192 mmsys routing table drivers/soc/mediatek/mt8192-mmsys.h | 67 ++++++++++++++++++++++++++++++++++ drivers/soc/mediatek/mtk-mmsys.c | 11 ++++++ include/linux/soc/mediatek/mtk-mmsys.h | 3 ++ 3 files changed, 81 insertions(+) create mode 100644 drivers/soc/mediatek/mt8192-mmsys.h -- 1.8.1.1.dirty

4 6

[PATCH v2 0/5] Add DRM/DSI support for MT8167 SoC
by Fabien Parent 10 Aug '21

10 Aug '21

This series adds support for DSI on the MT8167 SoC. HDMI is not yet supported as secondary display path. mmsys is not supported by this series and will be sent in a seperate series based on [0]. [0] https://patchwork.kernel.org/project/linux-mediatek/list/?series=360447 Changelog: V2: removed 3 patches Fabien Parent (5): dt-bindings: display: mediatek: disp: add documentation for MT8167 SoC dt-bindings: display: mediatek: dsi: add documentation for MT8167 SoC drm/mediatek: add disp-color MT8167 support drm/mediatek: add DDP support for MT8167 drm/mediatek: Add support for main DDP path on MT8167 .../display/mediatek/mediatek,disp.txt | 4 +- .../display/mediatek/mediatek,dsi.txt | 4 +- drivers/gpu/drm/mediatek/mtk_disp_color.c | 7 +++ drivers/gpu/drm/mediatek/mtk_drm_ddp.c | 47 +++++++++++++++++++ drivers/gpu/drm/mediatek/mtk_drm_drv.c | 38 +++++++++++++++ 5 files changed, 96 insertions(+), 4 deletions(-) -- 2.28.0

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dri-devel August 2021