dri-devel June 2022

dri-devel@lists.freedesktop.org

332 participants
697 discussions

[PATCH v4] drm/msm/dp: force link training for display resolution change
by Kuogee Hsieh 13 Jun '22

13 Jun '22

During display resolution changes display have to be disabled first followed by display enabling with new resolution. Display disable will turn off both pixel clock and main link clock so that main link have to be re trained during display enable to have new video stream flow again. At current implementation, display enable function manually kicks up irq_hpd_handle which will read panel link status and start link training if link status is not in sync state. However, there is rare case that a particular panel links status keep staying in sync for some period of time after main link had been shut down previously at display disabled. Main link retraining will not be executed by irq_hdp_handle() if the link status read from pane shows it is in sync state. If this was happen, then video stream of newer display resolution will fail to be transmitted to panel due to main link is not in sync between host and panel. This patch force main link always be retrained during display enable procedure to prevent this rare failed case from happening. Also this implementation are more efficient than manual kicking off irq_hpd_handle function. Changes in v2: -- set force_link_train flag on DP only (is_edp == false) Changes in v3: -- revise commit text -- add Fixes tag Changes in v4: -- revise commit text Fixes: 62671d2ef24b ("drm/msm/dp: fixes wrong connection state caused by failure of link train") Signed-off-by: Kuogee Hsieh <quic_khsieh(a)quicinc.com> --- drivers/gpu/drm/msm/dp/dp_ctrl.c | 6 +++--- drivers/gpu/drm/msm/dp/dp_ctrl.h | 2 +- drivers/gpu/drm/msm/dp/dp_display.c | 15 ++++++++------- 3 files changed, 12 insertions(+), 11 deletions(-) diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.c b/drivers/gpu/drm/msm/dp/dp_ctrl.c index af7a80c..bea93eb 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.c +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.c @@ -1551,7 +1551,7 @@ static int dp_ctrl_process_phy_test_request(struct dp_ctrl_private *ctrl) ret = dp_ctrl_on_link(&ctrl->dp_ctrl); if (!ret) - ret = dp_ctrl_on_stream(&ctrl->dp_ctrl); + ret = dp_ctrl_on_stream(&ctrl->dp_ctrl, false); else DRM_ERROR("failed to enable DP link controller\n"); @@ -1807,7 +1807,7 @@ static int dp_ctrl_link_retrain(struct dp_ctrl_private *ctrl) return dp_ctrl_setup_main_link(ctrl, &training_step); } -int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl) +int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool force_link_train) { int ret = 0; bool mainlink_ready = false; @@ -1848,7 +1848,7 @@ int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl) return 0; } - if (!dp_ctrl_channel_eq_ok(ctrl)) + if (force_link_train || !dp_ctrl_channel_eq_ok(ctrl)) dp_ctrl_link_retrain(ctrl); /* stop txing train pattern to end link training */ diff --git a/drivers/gpu/drm/msm/dp/dp_ctrl.h b/drivers/gpu/drm/msm/dp/dp_ctrl.h index 0745fde..b563e2e 100644 --- a/drivers/gpu/drm/msm/dp/dp_ctrl.h +++ b/drivers/gpu/drm/msm/dp/dp_ctrl.h @@ -21,7 +21,7 @@ struct dp_ctrl { }; int dp_ctrl_on_link(struct dp_ctrl *dp_ctrl); -int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl); +int dp_ctrl_on_stream(struct dp_ctrl *dp_ctrl, bool force_link_train); int dp_ctrl_off_link_stream(struct dp_ctrl *dp_ctrl); int dp_ctrl_off_link(struct dp_ctrl *dp_ctrl); int dp_ctrl_off(struct dp_ctrl *dp_ctrl); diff --git a/drivers/gpu/drm/msm/dp/dp_display.c b/drivers/gpu/drm/msm/dp/dp_display.c index c388323..370348d 100644 --- a/drivers/gpu/drm/msm/dp/dp_display.c +++ b/drivers/gpu/drm/msm/dp/dp_display.c @@ -872,7 +872,7 @@ static int dp_display_enable(struct dp_display_private *dp, u32 data) return 0; } - rc = dp_ctrl_on_stream(dp->ctrl); + rc = dp_ctrl_on_stream(dp->ctrl, data); if (!rc) dp_display->power_on = true; @@ -1654,6 +1654,7 @@ void dp_bridge_enable(struct drm_bridge *drm_bridge) int rc = 0; struct dp_display_private *dp_display; u32 state; + bool force_link_train = false; dp_display = container_of(dp, struct dp_display_private, dp_display); if (!dp_display->dp_mode.drm_mode.clock) { @@ -1688,10 +1689,14 @@ void dp_bridge_enable(struct drm_bridge *drm_bridge) state = dp_display->hpd_state; - if (state == ST_DISPLAY_OFF) + if (state == ST_DISPLAY_OFF) { dp_display_host_phy_init(dp_display); - dp_display_enable(dp_display, 0); + if (!dp->is_edp) + force_link_train = true; + } + + dp_display_enable(dp_display, force_link_train); rc = dp_display_post_enable(dp); if (rc) { @@ -1700,10 +1705,6 @@ void dp_bridge_enable(struct drm_bridge *drm_bridge) dp_display_unprepare(dp); } - /* manual kick off plug event to train link */ - if (state == ST_DISPLAY_OFF) - dp_add_event(dp_display, EV_IRQ_HPD_INT, 0, 0); - /* completed connection */ dp_display->hpd_state = ST_CONNECTED; -- The Qualcomm Innovation Center, Inc. is a member of the Code Aurora Forum, a Linux Foundation Collaborative Project

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Re: 504 to gitlab.freedesktop.org
by Daniel Stone 13 Jun '22

13 Jun '22

On Mon, 13 Jun 2022 at 05:17, Peter Hutterer <peter.hutterer(a)who-t.net> wrote: > On Sun, Jun 12, 2022 at 05:57:05PM -0700, Jeremy Sequoia wrote: > > I was going to spend a little bit of time putting out an update to XQuartz > > to address a few bugs that I've been meaning to squash, but I'm having a bit > > of an issue pulling down sources. > > > > Fetching via ssh://git@gitlab.freedesktop.org is giving me Permission denied > > (publickey,keyboard-interactive). I'm not sure if the latter is an infra > > issue or if the ssh key I have stored in my gitlab account are out of date > > (it's been about a year since I touched this). Unfortunately, I can't seem > > to access https://gitlab.freedesktop.org to check as it's constantly > > presenting me a 504 Gateway timeout. > > > > Is anyone else able to pull sources via ssh://git@gitlab.freedesktop.org > > right now? Is someone looking into the 504 issue? > > not an fdo admin but judging by the chatter on #freedesktop: no and yes, in > that order. seems like the infrastructure is in various stages of depositing > fecal matter on itself and the fixes are involved enough that the admins have > to be mentally awake, not merely physically. Yes, that's what's happening. Our (multi-host-replicated etc) Ceph storage setup has entered a degraded mode due to the loss of a couple of disks - no data has been lost but the cluster is currently unhappy. We're walking through fixing this, but have bumped into some other issues since, including a newly-flaky network setup, and changes since we last provisioned a new storage host. We're working through them one by one and will have the service back up with all our data intact - hopefully in a matter of hours but we have no firm ETA right now. Cheers, Daniel

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[PATCH libdrm] tests/util: Add simpledrm driver
by Eric Curtin 13 Jun '22

13 Jun '22

From: Eric Curtin <ericcurtin17(a)gmail.com> Add an entry for the "simpledrm" driver, so that the test utilities work with the simpledrm driver without passing the -M argument. Signed-off-by: Eric Curtin <ecurtin(a)redhat.com> --- - It's also here, was unsure whether to use MR or email submission https://gitlab.freedesktop.org/mesa/drm/-/merge_requests/243 --- tests/util/kms.c | 1 + 1 file changed, 1 insertion(+) diff --git a/tests/util/kms.c b/tests/util/kms.c index 39a93866..21a61a77 100644 --- a/tests/util/kms.c +++ b/tests/util/kms.c @@ -150,6 +150,7 @@ static const char * const modules[] = { "komeda", "imx-dcss", "mxsfb-drm", + "simpledrm", }; int util_open(const char *device, const char *module) -- 2.35.3

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[PATCH 00/33] drm/vc4: Misc fixes
by Maxime Ripard 13 Jun '22

13 Jun '22

Hi, Here's a collection of small fixes that have been used in the downstream kernel for a while, affecting several parts of the vc4 driver. Let me know what you think, Maxime Dave Stevenson (21): drm/vc4: drv: Adopt the dma configuration from the HVS or V3D component drm/vc4: plane: Fix margin calculations for the right/bottom edges drm/vc4: plane: Add alpha_blend_mode property to each plane. drm/vc4: hvs: Add debugfs node that dumps the current display lists drm/vc4: dpi: Add support for composite syncs to vc4_dpi drm/vc4: dpi: Add option for inverting pixel clock and output enable drm/vc4: dpi: Ensure a default format is selected drm/vc4: dsi: Release workaround buffer and DMA drm/vc4: dsi: Correct DSI divider calculations drm/vc4: dsi: Correct pixel order for DSI0 drm/vc4: dsi: Register dsi0 as the correct vc4 encoder type drm/vc4: dsi: Fix dsi0 interrupt support drm/vc4: dsi: Add correct stop condition to vc4_dsi_encoder_disable iteration drm/vc4: hdmi: Add all the vc5 HDMI registers into the debugfs dumps drm/vc4: hdmi: Reset HDMI MISC_CONTROL register drm/vc4: hdmi: Switch to pm_runtime_status_suspended drm/vc4: hdmi: Move HDMI reset to pm_resume drm/vc4: hdmi: Add HDMI format detection registers to register list drm/vc4: hdmi: Add MISC_CONTROL register for vc4 drm/vc4: hdmi: Correct HDMI timing registers for interlaced modes drm/vc4: hdmi: Move pixel doubling from Pixelvalve to HDMI block Dom Cobley (8): drm/vc4: plane: Remove subpixel positioning check drm/vc4: hdmi: Clear unused infoframe packet RAM registers drm/vc4: hdmi: Avoid full hdmi audio fifo writes drm/vc4: hdmi: Stop checking for enabled output in audio drm/vc4: hdmi: Skip writes to disabled packet RAM drm/vc4: hdmi: Remove VC4_HDMI_SCHEDULER_CONTROL_VERT_ALWAYS_KEEPOUT drm/vc4: hdmi: Report that 3d/stereo is allowed drm/vc4: hdmi: Force modeset when bpc or format changes Mateusz Kwiatkowski (1): drm/vc4: hdmi: Fix timings for interlaced modes Maxime Ripard (2): drm/vc4: kms: Warn if clk_set_min_rate fails drm/vc4: kms: Use maximum FIFO load for the HVS clock rate Phil Elwell (1): drm/vc4: hdmi: Disable audio if dmas property is present but empty drivers/gpu/drm/vc4/vc4_crtc.c | 14 +- drivers/gpu/drm/vc4/vc4_dpi.c | 99 +++++++------ drivers/gpu/drm/vc4/vc4_drv.c | 19 +++ drivers/gpu/drm/vc4/vc4_dsi.c | 152 +++++++++++++++----- drivers/gpu/drm/vc4/vc4_hdmi.c | 210 ++++++++++++++++++---------- drivers/gpu/drm/vc4/vc4_hdmi.h | 14 +- drivers/gpu/drm/vc4/vc4_hdmi_regs.h | 38 ++++- drivers/gpu/drm/vc4/vc4_hvs.c | 42 ++++++ drivers/gpu/drm/vc4/vc4_kms.c | 8 +- drivers/gpu/drm/vc4/vc4_plane.c | 92 ++++++++---- 10 files changed, 503 insertions(+), 185 deletions(-) -- 2.36.1

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[PATCH v8 00/14] Add some DRM bridge drivers support for i.MX8qm/qxp SoCs
by Liu Ying 13 Jun '22

13 Jun '22

Hi, This is the v8 series to add some DRM bridge drivers support for i.MX8qm/qxp SoCs. The bridges may chain one by one to form display pipes to support LVDS displays. The relevant display controller is DPU embedded in i.MX8qm/qxp SoCs. The DPU KMS driver can be found at: https://patchwork.kernel.org/project/dri-devel/list/?series=629908&state=%2… This series supports the following display pipes: 1) i.MX8qxp: prefetch eng -> DPU -> pixel combiner -> pixel link -> pixel link to DPI(PXL2DPI) -> LVDS display bridge(LDB) 2) i.MX8qm: prefetch eng -> DPU -> pixel combiner -> pixel link -> LVDS display bridge(LDB) Patch 1/14 and 2/14 add bus formats used by pixel combiner. Patch 9/14 adds a helper for LDB bridge drivers. Patch 3/14 ~ 8/14 and 10/14 ~ 12/14 add drm bridge drivers and dt-bindings support for the bridges. Patch 13/14 adds dt-binding for Control and Status Registers module(a syscon used by PXL2DPI and LDB), which references the PXL2DPI and LDB schemas. Patch 14/14 updates MAINTAINERS. I've tested this series with a koe,tx26d202vm0bwa dual link LVDS panel and a LVDS to HDMI bridge(with a downstream drm bridge driver). Marcel Ziswiler has tested v6 with two LVDS panels(single link LT170410-2WHC and dual link LP156WF1) on Toradex Colibri iMX8X. Welcome comments, thanks. v7->v8: * Rebase upon v5.19-rc1. * Use devm_drm_of_get_bridge() in patch 9/14 due to the rebase. * Reorder the patch for adding dt-binding for Control and Status Registers module as patch 13/14, as it references PXL2DPI and LDB schemas in this series. v6->v7: * Fix complaints from 'checkpatch.pl --strict' on the LDB DRM bridge helper driver(patch 10/14) and some DRM bridge drivers(patch 9/14, 12/14 and 13/14). (Robert) * Fix complaints from 'checkpatch --strict' on the rest DRM bridge drivers(patch 4/14 and 6/14). * A trivial indentation fix for patch 9/14. (Robert) * Add Robert's R-b tags on patch 9/14, 10/14, 12/14, 13/14 and 14/14. * Add Marcel's T-b tags on all DRM bridge drivers. * Add Rob's R-b tag on patch 7/14 for CSR module dt-binding. v5->v6: * Fix data organizations in documentation(patch 2/14) for MEDIA_BUS_FMT_RGB{666,888}_1X30-CPADLO. (Laurent) * Add Laurent's R-b tags on patch 1/14 and 2/14. * Drop 'select' schema from the CSR dt-binding documentation(patch 7/14). (Rob) * Add Rob's R-b tag on patch 8/14. v4->v5: * Drop the patch 'phy: Add LVDS configuration options'. (Robert) * Add Robert's R-b tags on patch 1/14, 2/14, 4/14 and 6/14. * Drop the 'PC_BUF_PARA_REG' register definition from the pixel combiner bridge driver(patch 4/14). (Robert) * Make a comment occupy a line in the pixel link bridge driver(patch 6/14). (Robert) * Introduce a new patch(patch 7/14) to add dt-binding for Control and Status Registers module. (Rob) * Make imx-ldb-helper be a pure object to be linked with i.MX8qxp LDB bridge driver and i.MX8qm LDB bridge driver, instead of a module. Correspondingly, rename 'imx8{qm, qxp}-ldb.c' to 'imx8{qm, qxp}-ldb-drv.c'. (Robert) * Move 'imx_ldb_helper.h' to 'drivers/gpu/drm/bridge/imx/imx-ldb-helper.h'. (Robert) * s/__FSL_IMX_LDB__/__IMX_LDB_HELPER__/ for 'imx-ldb-helper.h'. v3->v4: * Use 'fsl,sc-resource' DT property to get the SCU resource ID associated with the PXL2DPI instance instead of using alias ID. (Rob) * Add Rob's R-b tag on patch 11/14. v2->v3: * Drop 'fsl,syscon' DT properties from fsl,imx8qxp-ldb.yaml and fsl,imx8qxp-pxl2dpi.yaml. (Rob) * Mention the CSR module controls LDB and PXL2DPI in fsl,imx8qxp-ldb.yaml and fsl,imx8qxp-pxl2dpi.yaml. * Call syscon_node_to_regmap() to get regmaps from LDB bridge helper driver and PXL2DPI bridger driver instead of syscon_regmap_lookup_by_phandle(). * Drop two macros from pixel link bridge driver which help define functions and define them directly. * Properly disable all pixel link controls to POR value by calling imx8qxp_pixel_link_disable_all_controls() from imx8qxp_pixel_link_bridge_probe(). * Add Rob's R-b tags on patch 4/14 and 6/14. v1->v2: * Rebase the series upon the latest drm-misc-next branch(5.11-rc2 based). * Use graph schema in the dt-bindings of the bridges. (Laurent) * Require all four pixel link output ports in fsl,imx8qxp-pixel-link.yaml. (Laurent) * Side note i.MX8qm/qxp LDB official name 'pixel mapper' in fsl,imx8qxp-ldb.yaml. (Laurent) * Mention pixel link is accessed via SCU firmware in fsl,imx8qxp-pixel-link.yaml. (Rob) * Use enum instead of oneOf + const for the reg property of pixel combiner channels in fsl,imx8qxp-pixel-combiner.yaml. (Rob) * Rewrite the function to find the next bridge in pixel link bridge driver by properly using OF APIs and dropping unnecessary DT validation. (Rob) * Drop unnecessary port availability check in i.MX8qxp pixel link to DPI bridge driver. * Drop unnecessary DT validation from i.MX8qxp LDB bridge driver. * Use of_graph_get_endpoint_by_regs() and of_graph_get_remote_endpoint() to get the input remote endpoint in imx8qxp_ldb_set_di_id() of i.MX8qxp LDB bridge driver. * Avoid using companion_port OF node after putting it in imx8qxp_ldb_parse_dt_companion() of i.MX8qxp LDB bridge driver. * Drop unnecessary check for maximum available LDB channels from i.MX8qm LDB bridge driver. * Mention i.MX8qm/qxp LDB official name 'pixel mapper' in i.MX8qm/qxp LDB bridge drivers and Kconfig help messages. Liu Ying (14): media: uapi: Add some RGB bus formats for i.MX8qm/qxp pixel combiner media: docs: Add some RGB bus formats for i.MX8qm/qxp pixel combiner dt-bindings: display: bridge: Add i.MX8qm/qxp pixel combiner binding drm/bridge: imx: Add i.MX8qm/qxp pixel combiner support dt-bindings: display: bridge: Add i.MX8qm/qxp display pixel link binding drm/bridge: imx: Add i.MX8qm/qxp display pixel link support dt-bindings: display: bridge: Add i.MX8qxp pixel link to DPI binding drm/bridge: imx: Add i.MX8qxp pixel link to DPI support drm/bridge: imx: Add LDB driver helper support dt-bindings: display: bridge: Add i.MX8qm/qxp LVDS display bridge binding drm/bridge: imx: Add LDB support for i.MX8qxp drm/bridge: imx: Add LDB support for i.MX8qm dt-bindings: mfd: Add i.MX8qm/qxp Control and Status Registers module binding MAINTAINERS: add maintainer for DRM bridge drivers for i.MX SoCs .../display/bridge/fsl,imx8qxp-ldb.yaml | 173 +++++ .../bridge/fsl,imx8qxp-pixel-combiner.yaml | 144 ++++ .../bridge/fsl,imx8qxp-pixel-link.yaml | 106 +++ .../display/bridge/fsl,imx8qxp-pxl2dpi.yaml | 108 +++ .../bindings/mfd/fsl,imx8qxp-csr.yaml | 192 +++++ .../media/v4l/subdev-formats.rst | 156 ++++ MAINTAINERS | 10 + drivers/gpu/drm/bridge/Kconfig | 2 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/imx/Kconfig | 42 + drivers/gpu/drm/bridge/imx/Makefile | 9 + drivers/gpu/drm/bridge/imx/imx-ldb-helper.c | 220 ++++++ drivers/gpu/drm/bridge/imx/imx-ldb-helper.h | 96 +++ drivers/gpu/drm/bridge/imx/imx8qm-ldb-drv.c | 587 ++++++++++++++ drivers/gpu/drm/bridge/imx/imx8qxp-ldb-drv.c | 722 ++++++++++++++++++ .../drm/bridge/imx/imx8qxp-pixel-combiner.c | 448 +++++++++++ .../gpu/drm/bridge/imx/imx8qxp-pixel-link.c | 429 +++++++++++ drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c | 487 ++++++++++++ include/uapi/linux/media-bus-format.h | 6 +- 19 files changed, 3937 insertions(+), 1 deletion(-) create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-ldb.yaml create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-combiner.yaml create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pixel-link.yaml create mode 100644 Documentation/devicetree/bindings/display/bridge/fsl,imx8qxp-pxl2dpi.yaml create mode 100644 Documentation/devicetree/bindings/mfd/fsl,imx8qxp-csr.yaml create mode 100644 drivers/gpu/drm/bridge/imx/Kconfig create mode 100644 drivers/gpu/drm/bridge/imx/Makefile create mode 100644 drivers/gpu/drm/bridge/imx/imx-ldb-helper.c create mode 100644 drivers/gpu/drm/bridge/imx/imx-ldb-helper.h create mode 100644 drivers/gpu/drm/bridge/imx/imx8qm-ldb-drv.c create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-ldb-drv.c create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-pixel-combiner.c create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-pixel-link.c create mode 100644 drivers/gpu/drm/bridge/imx/imx8qxp-pxl2dpi.c -- 2.25.1

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[PATCH] gpu/drm/bridge/cadence: avoid flush_scheduled_work() usage
by Tetsuo Handa 13 Jun '22

13 Jun '22

Use local wq in order to avoid flush_scheduled_work() usage. Signed-off-by: Tetsuo Handa <penguin-kernel(a)I-love.SAKURA.ne.jp> --- Please see commit c4f135d643823a86 ("workqueue: Wrap flush_workqueue() using a macro") for background. This is a blind conversion, and is only compile tested. .../drm/bridge/cadence/cdns-mhdp8546-core.c | 30 ++++++++++++++++--- .../drm/bridge/cadence/cdns-mhdp8546-core.h | 2 ++ .../drm/bridge/cadence/cdns-mhdp8546-hdcp.c | 16 +++++----- 3 files changed, 36 insertions(+), 12 deletions(-) diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c index 67f0f444b4e8..1d7c6af66217 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.c @@ -53,6 +53,8 @@ #include "cdns-mhdp8546-hdcp.h" #include "cdns-mhdp8546-j721e.h" +struct workqueue_struct *cadence_mhdp_wq; + static int cdns_mhdp_mailbox_read(struct cdns_mhdp_device *mhdp) { int ret, empty; @@ -2049,7 +2051,7 @@ static void cdns_mhdp_atomic_enable(struct drm_bridge *bridge, out: mutex_unlock(&mhdp->link_mutex); if (ret < 0) - schedule_work(&mhdp->modeset_retry_work); + queue_work(cadence_mhdp_wq, &mhdp->modeset_retry_work); } static void cdns_mhdp_atomic_disable(struct drm_bridge *bridge, @@ -2373,7 +2375,7 @@ static irqreturn_t cdns_mhdp_irq_handler(int irq, void *data) spin_unlock(&mhdp->start_lock); if (bridge_attached && (sw_ev0 & CDNS_DPTX_HPD)) { - schedule_work(&mhdp->hpd_work); + queue_work(cadence_mhdp_wq, &mhdp->hpd_work); } if (sw_ev0 & ~CDNS_DPTX_HPD) { @@ -2413,7 +2415,7 @@ static void cdns_mhdp_hpd_work(struct work_struct *work) ret = cdns_mhdp_update_link_status(mhdp); if (mhdp->connector.dev) { if (ret < 0) - schedule_work(&mhdp->modeset_retry_work); + queue_work(cadence_mhdp_wq, &mhdp->modeset_retry_work); else drm_kms_helper_hotplug_event(mhdp->bridge.dev); } else { @@ -2632,7 +2634,27 @@ static struct platform_driver mhdp_driver = { .probe = cdns_mhdp_probe, .remove = cdns_mhdp_remove, }; -module_platform_driver(mhdp_driver); + +static int __init mhdp_init(void) +{ + int ret; + + cadence_mhdp_wq = alloc_workqueue("cadence_mhdp_wq", 0, 0); + if (!cadence_mhdp_wq) + return -ENOMEM; + ret = platform_driver_register(&mhdp_driver); + if (ret) + destroy_workqueue(cadence_mhdp_wq); + return ret; +} +module_init(mhdp_init); + +static void __exit mhdp_exit(void) +{ + platform_driver_unregister(&mhdp_driver); + destroy_workqueue(cadence_mhdp_wq); +} +module_exit(mhdp_exit); MODULE_FIRMWARE(FW_NAME); diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h index bedddd510d17..e6c475612480 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h +++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-core.h @@ -419,4 +419,6 @@ struct cdns_mhdp_device { u32 cdns_mhdp_wait_for_sw_event(struct cdns_mhdp_device *mhdp, uint32_t event); +extern struct workqueue_struct *cadence_mhdp_wq; + #endif diff --git a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c index 946212a95598..09f9e3d42f11 100644 --- a/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c +++ b/drivers/gpu/drm/bridge/cadence/cdns-mhdp8546-hdcp.c @@ -449,14 +449,14 @@ static int cdns_mhdp_hdcp_check_link(struct cdns_mhdp_device *mhdp) ret = _cdns_mhdp_hdcp_disable(mhdp); if (ret) { mhdp->hdcp.value = DRM_MODE_CONTENT_PROTECTION_DESIRED; - schedule_work(&mhdp->hdcp.prop_work); + queue_work(cadence_mhdp_wq, &mhdp->hdcp.prop_work); goto out; } ret = _cdns_mhdp_hdcp_enable(mhdp, mhdp->hdcp.hdcp_content_type); if (ret) { mhdp->hdcp.value = DRM_MODE_CONTENT_PROTECTION_DESIRED; - schedule_work(&mhdp->hdcp.prop_work); + queue_work(cadence_mhdp_wq, &mhdp->hdcp.prop_work); } out: mutex_unlock(&mhdp->hdcp.mutex); @@ -474,8 +474,8 @@ static void cdns_mhdp_hdcp_check_work(struct work_struct *work) hdcp); if (!cdns_mhdp_hdcp_check_link(mhdp)) - schedule_delayed_work(&hdcp->check_work, - DRM_HDCP_CHECK_PERIOD_MS); + queue_delayed_work(cadence_mhdp_wq, &hdcp->check_work, + DRM_HDCP_CHECK_PERIOD_MS); } static void cdns_mhdp_hdcp_prop_work(struct work_struct *work) @@ -538,9 +538,9 @@ int cdns_mhdp_hdcp_enable(struct cdns_mhdp_device *mhdp, u8 content_type) mhdp->hdcp.hdcp_content_type = content_type; mhdp->hdcp.value = DRM_MODE_CONTENT_PROTECTION_ENABLED; - schedule_work(&mhdp->hdcp.prop_work); - schedule_delayed_work(&mhdp->hdcp.check_work, - DRM_HDCP_CHECK_PERIOD_MS); + queue_work(cadence_mhdp_wq, &mhdp->hdcp.prop_work); + queue_delayed_work(cadence_mhdp_wq, &mhdp->hdcp.check_work, + DRM_HDCP_CHECK_PERIOD_MS); out: mutex_unlock(&mhdp->hdcp.mutex); return ret; @@ -553,7 +553,7 @@ int cdns_mhdp_hdcp_disable(struct cdns_mhdp_device *mhdp) mutex_lock(&mhdp->hdcp.mutex); if (mhdp->hdcp.value != DRM_MODE_CONTENT_PROTECTION_UNDESIRED) { mhdp->hdcp.value = DRM_MODE_CONTENT_PROTECTION_UNDESIRED; - schedule_work(&mhdp->hdcp.prop_work); + queue_work(cadence_mhdp_wq, &mhdp->hdcp.prop_work); ret = _cdns_mhdp_hdcp_disable(mhdp); } mutex_unlock(&mhdp->hdcp.mutex); -- 2.18.4

1 2

[PATCH] drm/edid: ignore the CEA modes not defined in CEA-861-D
by William Tseng 13 Jun '22

13 Jun '22

This is a workaround for HDMI 1.4 sink which has a CEA mode with higher vic than what is defined in CEA-861-D. As an example, a HDMI 1.4 sink has the video format 2560x1080p to be displayed and the video format is indicated by both SVD (with vic 90 and pictuure aspect ratio 64:27) and DTD. When connecting to such sink, source can't output the video format in SVD because an error is returned by drm_hdmi_avi_infoframe_from_display_mode(), which can't fill the infoframe with pictuure aspect ratio 64:27 and the vic, which is originally 90 and is changed to 0 by drm_mode_cea_vic(). To work around it, this patch ignores such CEA modes in do_cea_modes() so the modes won't be processed in drm_hdmi_avi_infoframe_from_display_mode(). And only the video format in DTD can be dispalyed. Cc: Ville Syrjälä <ville.syrjala(a)linux.intel.com> Cc: Wayne Lin <waynelin(a)amd.com> Cc: Lee Shawn C <shawn.c.lee(a)intel.com> Signed-off-by: William Tseng <william.tseng(a)intel.com> --- drivers/gpu/drm/drm_edid.c | 39 +++++++++++++++++++++++++------------- 1 file changed, 26 insertions(+), 13 deletions(-) diff --git a/drivers/gpu/drm/drm_edid.c b/drivers/gpu/drm/drm_edid.c index bc43e1b32092..a93f68878bfd 100644 --- a/drivers/gpu/drm/drm_edid.c +++ b/drivers/gpu/drm/drm_edid.c @@ -3982,6 +3982,19 @@ drm_display_mode_from_cea_vic(struct drm_device *dev, } EXPORT_SYMBOL(drm_display_mode_from_cea_vic); +static bool is_hdmi2_sink(const struct drm_connector *connector) +{ + /* + * FIXME: sil-sii8620 doesn't have a connector around when + * we need one, so we have to be prepared for a NULL connector. + */ + if (!connector) + return true; + + return connector->display_info.hdmi.scdc.supported || + connector->display_info.color_formats & DRM_COLOR_FORMAT_YCBCR420; +} + static int do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len) { @@ -3993,6 +4006,19 @@ do_cea_modes(struct drm_connector *connector, const u8 *db, u8 len) mode = drm_display_mode_from_vic_index(connector, db, len, i); if (mode) { + u8 vic = svd_to_vic(db[i]); + + if (!drm_valid_cea_vic(vic)) + continue; + + /* + * HDMI 1.4 VIC range: 1 <= VIC <= 64 (CEA-861-D) but + * HDMI 2.0 VIC range: 1 <= VIC <= 107 (CEA-861-F). So we + * have to make sure we dont break HDMI 1.4 sinks. + */ + if (!is_hdmi2_sink(connector) && vic > 64) + continue; + /* * YCBCR420 capability block contains a bitmap which * gives the index of CEA modes from CEA VDB, which @@ -5846,19 +5872,6 @@ void drm_set_preferred_mode(struct drm_connector *connector, } EXPORT_SYMBOL(drm_set_preferred_mode); -static bool is_hdmi2_sink(const struct drm_connector *connector) -{ - /* - * FIXME: sil-sii8620 doesn't have a connector around when - * we need one, so we have to be prepared for a NULL connector. - */ - if (!connector) - return true; - - return connector->display_info.hdmi.scdc.supported || - connector->display_info.color_formats & DRM_COLOR_FORMAT_YCBCR420; -} - static u8 drm_mode_hdmi_vic(const struct drm_connector *connector, const struct drm_display_mode *mode) { -- 2.17.1

5 15

[PATCH v2 00/12] drm: bridge: Add Samsung MIPI DSIM bridge
by Jagan Teki 13 Jun '22

13 Jun '22

This series supports common bridge support for Samsung MIPI DSIM which is used in Exynos and i.MX8MM SoC's. Previous v1 can be available here [1]. The final bridge supports both the Exynos and i.MX8MM DSI devices. On, summary this patch-set break the entire DSIM driver into - platform specific glue code for platform ops, component_ops. - common bridge driver which handle platform glue init and invoke. Patch 0000: Samsung DSIM bridge Patch 0001: Common lookup code for OF-graph or child Patch 0002: platform init flag via driver_data Patch 0003/10: bridge fixes, atomic API's Patch 0011: document fsl,imx8mm-mipi-dsim Patch 0012: add i.MX8MM DSIM support Tested in Engicam i.Core MX8M Mini SoM. Anyone interested, please have a look on this repo [2] [2] https://github.com/openedev/kernel/tree/imx8mm-dsi-v2 [1] https://patchwork.kernel.org/project/dri-devel/cover/20220408162108.184583-… Any inputs? Jagan. Jagan Teki (12): drm: bridge: Add Samsung DSIM bridge driver drm: bridge: samsung-dsim: Lookup OF-graph or Child node devices drm: bridge: samsung-dsim: Handle platform init via driver_data drm: bridge: samsung-dsim: Mark PHY as optional drm: bridge: samsung-dsim: Add DSI init in bridge pre_enable() drm: bridge: samsung-dsim: Fix PLL_P (PMS_P) offset drm: bridge: samsung-dsim: Add module init, exit drm: bridge: samsung-dsim: Add atomic_check drm: bridge: samsung-dsim: Add atomic_get_input_bus_fmts drm: bridge: samsung-dsim: Add input_bus_flags dt-bindings: display: exynos: dsim: Add NXP i.MX8MM support drm: bridge: samsung-dsim: Add i.MX8MM support .../bindings/display/exynos/exynos_dsim.txt | 1 + MAINTAINERS | 8 + drivers/gpu/drm/bridge/Kconfig | 12 + drivers/gpu/drm/bridge/Makefile | 1 + drivers/gpu/drm/bridge/samsung-dsim.c | 1847 +++++++++++++++++ drivers/gpu/drm/exynos/Kconfig | 1 + drivers/gpu/drm/exynos/exynos_drm_dsi.c | 1724 +-------------- include/drm/bridge/samsung-dsim.h | 99 + 8 files changed, 2032 insertions(+), 1661 deletions(-) create mode 100644 drivers/gpu/drm/bridge/samsung-dsim.c create mode 100644 include/drm/bridge/samsung-dsim.h -- 2.25.1

7 33

[PATCH] MAINTAINERS: add include/dt-bindings/display to DRM DRIVERS
by Lukas Bulwahn 13 Jun '22

13 Jun '22

Maintainers of the directory Documentation/devicetree/bindings/display are also the maintainers of the corresponding directory include/dt-bindings/display. Add the file entry for include/dt-bindings/display to the appropriate section in MAINTAINERS. Signed-off-by: Lukas Bulwahn <lukas.bulwahn(a)gmail.com> --- David, Daniel, please pick this MAINTAINERS addition to your section. MAINTAINERS | 1 + 1 file changed, 1 insertion(+) diff --git a/MAINTAINERS b/MAINTAINERS index 2e7d1e885aed..a8d243668992 100644 --- a/MAINTAINERS +++ b/MAINTAINERS @@ -6597,6 +6597,7 @@ F: Documentation/devicetree/bindings/gpu/ F: Documentation/gpu/ F: drivers/gpu/ F: include/drm/ +F: include/dt-bindings/display/ F: include/linux/vga* F: include/uapi/drm/ -- 2.17.1

1 0

[PATCH v2 00/15] drm/edid: expand on struct drm_edid usage
by Jani Nikula 13 Jun '22

13 Jun '22

v2 of [1], addressing review comments. BR, Jani. [1] https://patchwork.freedesktop.org/series/104309/ Jani Nikula (15): drm/edid: fix CTA data block collection size for CTA version 3 drm/edid: abstract cea data block collection size drm/edid: add block count and data helper functions for drm_edid drm/edid: keep track of alloc size in drm_do_get_edid() drm/edid: add new interfaces around struct drm_edid drm/edid: add drm_edid_connector_update() drm/probe-helper: abstract .get_modes() connector helper call drm/probe-helper: add drm_connector_helper_get_modes() drm/edid: add drm_edid_raw() to access the raw EDID data drm/i915/edid: convert DP, HDMI and LVDS to drm_edid drm/i915/bios: convert intel_bios_init_panel() to drm_edid drm/edid: do invalid block filtering in-place drm/edid: add HF-EEODB support to EDID read and allocation drm/edid: take HF-EEODB extension count into account drm/todo: add entry for converting the subsystem to struct drm_edid Documentation/gpu/todo.rst | 25 + drivers/gpu/drm/drm_connector.c | 2 + drivers/gpu/drm/drm_edid.c | 572 ++++++++++++++++-- drivers/gpu/drm/drm_probe_helper.c | 63 +- drivers/gpu/drm/i915/display/intel_bios.c | 23 +- drivers/gpu/drm/i915/display/intel_bios.h | 4 +- .../gpu/drm/i915/display/intel_connector.c | 4 +- .../drm/i915/display/intel_display_types.h | 4 +- drivers/gpu/drm/i915/display/intel_dp.c | 74 ++- drivers/gpu/drm/i915/display/intel_hdmi.c | 26 +- drivers/gpu/drm/i915/display/intel_lvds.c | 37 +- include/drm/drm_edid.h | 12 + include/drm/drm_probe_helper.h | 1 + 13 files changed, 692 insertions(+), 155 deletions(-) -- 2.30.2

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